drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c- Extension
.c- Size
- 9037 bytes
- Lines
- 377
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/stmmac.hcommon.hdwxgmac2.h
Detected Declarations
function Copyrightfunction dwxgmac2_get_rx_statusfunction dwxgmac2_set_tx_ownerfunction dwxgmac2_set_rx_ownerfunction dwxgmac2_wrback_get_rx_vlan_tcifunction dwxgmac2_wrback_get_rx_vlan_validfunction dwxgmac2_get_rx_frame_lenfunction dwxgmac2_enable_tx_timestampfunction dwxgmac2_get_tx_timestamp_statusfunction dwxgmac2_get_timestampfunction dwxgmac2_rx_check_timestampfunction dwxgmac2_get_rx_timestamp_statusfunction dwxgmac2_init_rx_descfunction dwxgmac2_init_tx_descfunction dwxgmac2_prepare_tx_descfunction dwxgmac2_prepare_tso_tx_descfunction dwxgmac2_release_tx_descfunction dwxgmac2_set_tx_icfunction dwxgmac2_set_mssfunction dwxgmac2_set_addrfunction dwxgmac2_clearfunction dwxgmac2_get_rx_hashfunction dwxgmac2_get_rx_header_lenfunction dwxgmac2_set_sec_addrfunction dwxgmac2_set_sarcfunction dwxgmac2_set_vlan_tagfunction dwxgmac2_set_vlanfunction dwxgmac2_set_tbs
Annotated Snippet
switch (ptype) {
case XGMAC_L34T_IP4TCP:
case XGMAC_L34T_IP4UDP:
case XGMAC_L34T_IP6TCP:
case XGMAC_L34T_IP6UDP:
*type = PKT_HASH_TYPE_L4;
break;
default:
*type = PKT_HASH_TYPE_L3;
break;
}
*hash = le32_to_cpu(p->des1);
return 0;
}
return -EINVAL;
}
static void dwxgmac2_get_rx_header_len(struct dma_desc *p, unsigned int *len)
{
if (le32_to_cpu(p->des3) & XGMAC_RDES3_L34T)
*len = le32_to_cpu(p->des2) & XGMAC_RDES2_HL;
}
static void dwxgmac2_set_sec_addr(struct dma_desc *p, dma_addr_t addr, bool is_valid)
{
p->des2 = cpu_to_le32(lower_32_bits(addr));
p->des3 = cpu_to_le32(upper_32_bits(addr));
}
static void dwxgmac2_set_sarc(struct dma_desc *p, u32 sarc_type)
{
p->des3 |= cpu_to_le32(FIELD_PREP(XGMAC_TDES3_SAIC, sarc_type));
}
static void dwxgmac2_set_vlan_tag(struct dma_desc *p, u16 tag, u16 inner_tag,
u32 inner_type)
{
p->des0 = 0;
p->des1 = 0;
p->des2 = 0;
p->des3 = 0;
/* Inner VLAN */
if (inner_type) {
u32 des = FIELD_PREP(XGMAC_TDES2_IVT, inner_tag);
p->des2 = cpu_to_le32(des);
des = FIELD_PREP(XGMAC_TDES3_IVTIR, inner_type);
p->des3 = cpu_to_le32(des | XGMAC_TDES3_IVLTV);
}
/* Outer VLAN */
p->des3 |= cpu_to_le32(tag & XGMAC_TDES3_VT);
p->des3 |= cpu_to_le32(XGMAC_TDES3_VLTV);
p->des3 |= cpu_to_le32(XGMAC_TDES3_CTXT);
}
static void dwxgmac2_set_vlan(struct dma_desc *p, u32 type)
{
p->des2 |= cpu_to_le32(FIELD_PREP(XGMAC_TDES2_VTIR, type));
}
static void dwxgmac2_set_tbs(struct dma_edesc *p, u32 sec, u32 nsec)
{
p->des4 = cpu_to_le32((sec & XGMAC_TDES0_LT) | XGMAC_TDES0_LTV);
p->des5 = cpu_to_le32(nsec & XGMAC_TDES1_LT);
p->des6 = 0;
p->des7 = 0;
}
const struct stmmac_desc_ops dwxgmac210_desc_ops = {
.tx_status = dwxgmac2_get_tx_status,
.rx_status = dwxgmac2_get_rx_status,
.set_tx_owner = dwxgmac2_set_tx_owner,
.set_rx_owner = dwxgmac2_set_rx_owner,
.get_rx_vlan_tci = dwxgmac2_wrback_get_rx_vlan_tci,
.get_rx_vlan_valid = dwxgmac2_wrback_get_rx_vlan_valid,
.get_rx_frame_len = dwxgmac2_get_rx_frame_len,
.enable_tx_timestamp = dwxgmac2_enable_tx_timestamp,
.get_tx_timestamp_status = dwxgmac2_get_tx_timestamp_status,
.get_rx_timestamp_status = dwxgmac2_get_rx_timestamp_status,
.get_timestamp = dwxgmac2_get_timestamp,
.set_tx_ic = dwxgmac2_set_tx_ic,
.prepare_tx_desc = dwxgmac2_prepare_tx_desc,
.prepare_tso_tx_desc = dwxgmac2_prepare_tso_tx_desc,
.release_tx_desc = dwxgmac2_release_tx_desc,
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/stmmac.h`, `common.h`, `dwxgmac2.h`.
- Detected declarations: `function Copyright`, `function dwxgmac2_get_rx_status`, `function dwxgmac2_set_tx_owner`, `function dwxgmac2_set_rx_owner`, `function dwxgmac2_wrback_get_rx_vlan_tci`, `function dwxgmac2_wrback_get_rx_vlan_valid`, `function dwxgmac2_get_rx_frame_len`, `function dwxgmac2_enable_tx_timestamp`, `function dwxgmac2_get_tx_timestamp_status`, `function dwxgmac2_get_timestamp`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.