drivers/net/ethernet/sun/sungem.h
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/sun/sungem.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/sun/sungem.h- Extension
.h- Size
- 42674 bytes
- Lines
- 1029
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct gem_txdstruct gem_rxdstruct gem_init_blockstruct gemenum gem_phy_typeenum link_state
Annotated Snippet
struct gem_txd {
__le64 control_word;
__le64 buffer;
};
#define TXDCTRL_BUFSZ 0x0000000000007fffULL /* Buffer Size */
#define TXDCTRL_CSTART 0x00000000001f8000ULL /* CSUM Start Offset */
#define TXDCTRL_COFF 0x000000001fe00000ULL /* CSUM Stuff Offset */
#define TXDCTRL_CENAB 0x0000000020000000ULL /* CSUM Enable */
#define TXDCTRL_EOF 0x0000000040000000ULL /* End of Frame */
#define TXDCTRL_SOF 0x0000000080000000ULL /* Start of Frame */
#define TXDCTRL_INTME 0x0000000100000000ULL /* "Interrupt Me" */
#define TXDCTRL_NOCRC 0x0000000200000000ULL /* No CRC Present */
/* GEM requires that RX descriptors are provided four at a time,
* aligned. Also, the RX ring may not wrap around. This means that
* there will be at least 4 unused descriptor entries in the middle
* of the RX ring at all times.
*
* Similar to HME, GEM assumes that it can write garbage bytes before
* the beginning of the buffer and right after the end in order to DMA
* whole cachelines.
*
* Unlike for TX, GEM does update the status word in the RX descriptors
* when packets arrive. Therefore an ownership bit does exist in the
* RX descriptors. It is advisory, GEM clears it but does not check
* it in any way. So when buffers are posted to the RX ring (via the
* RX Kick register) by the driver it must make sure the buffers are
* truly ready and that the ownership bits are set properly.
*
* Even though GEM modifies the RX descriptors, it guarantees that the
* buffer DMA address field will stay the same when it performs these
* updates. Therefore it can be used to keep track of DMA mappings
* by the host driver just as in the TX descriptor case above.
*/
struct gem_rxd {
__le64 status_word;
__le64 buffer;
};
#define RXDCTRL_TCPCSUM 0x000000000000ffffULL /* TCP Pseudo-CSUM */
#define RXDCTRL_BUFSZ 0x000000007fff0000ULL /* Buffer Size */
#define RXDCTRL_OWN 0x0000000080000000ULL /* GEM owns this entry */
#define RXDCTRL_HASHVAL 0x0ffff00000000000ULL /* Hash Value */
#define RXDCTRL_HPASS 0x1000000000000000ULL /* Passed Hash Filter */
#define RXDCTRL_ALTMAC 0x2000000000000000ULL /* Matched ALT MAC */
#define RXDCTRL_BAD 0x4000000000000000ULL /* Frame has bad CRC */
#define RXDCTRL_FRESH(gp) \
((((RX_BUF_ALLOC_SIZE(gp) - RX_OFFSET) << 16) & RXDCTRL_BUFSZ) | \
RXDCTRL_OWN)
#define TX_RING_SIZE 128
#define RX_RING_SIZE 128
#if TX_RING_SIZE == 32
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_32
#elif TX_RING_SIZE == 64
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_64
#elif TX_RING_SIZE == 128
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_128
#elif TX_RING_SIZE == 256
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_256
#elif TX_RING_SIZE == 512
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_512
#elif TX_RING_SIZE == 1024
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_1K
#elif TX_RING_SIZE == 2048
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_2K
#elif TX_RING_SIZE == 4096
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_4K
#elif TX_RING_SIZE == 8192
#define TXDMA_CFG_BASE TXDMA_CFG_RINGSZ_8K
#else
#error TX_RING_SIZE value is illegal...
#endif
#if RX_RING_SIZE == 32
#define RXDMA_CFG_BASE RXDMA_CFG_RINGSZ_32
#elif RX_RING_SIZE == 64
#define RXDMA_CFG_BASE RXDMA_CFG_RINGSZ_64
#elif RX_RING_SIZE == 128
#define RXDMA_CFG_BASE RXDMA_CFG_RINGSZ_128
#elif RX_RING_SIZE == 256
#define RXDMA_CFG_BASE RXDMA_CFG_RINGSZ_256
#elif RX_RING_SIZE == 512
#define RXDMA_CFG_BASE RXDMA_CFG_RINGSZ_512
#elif RX_RING_SIZE == 1024
#define RXDMA_CFG_BASE RXDMA_CFG_RINGSZ_1K
#elif RX_RING_SIZE == 2048
Annotation
- Detected declarations: `struct gem_txd`, `struct gem_rxd`, `struct gem_init_block`, `struct gem`, `enum gem_phy_type`, `enum link_state`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.