drivers/net/ethernet/ti/cpsw_priv.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/ti/cpsw_priv.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/ti/cpsw_priv.c- Extension
.c- Size
- 40086 bytes
- Lines
- 1604
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bpf.hlinux/bpf_trace.hlinux/if_ether.hlinux/if_vlan.hlinux/kmemleak.hlinux/module.hlinux/netdevice.hlinux/net_tstamp.hlinux/of.hlinux/phy.hlinux/platform_device.hlinux/pm_runtime.hlinux/skbuff.hnet/page_pool/helpers.hnet/pkt_cls.hnet/pkt_sched.hcpsw.hcpts.hcpsw_ale.hcpsw_priv.hcpsw_sl.hdavinci_cpdma.h
Detected Declarations
function cpsw_intr_enablefunction cpsw_intr_disablefunction cpsw_tx_handlerfunction cpsw_tx_interruptfunction cpsw_rx_interruptfunction cpsw_misc_interruptfunction cpsw_tx_mq_pollfunction cpsw_tx_pollfunction cpsw_rx_mq_pollfunction cpsw_rx_pollfunction cpsw_rx_vlan_encapfunction cpsw_set_slave_macfunction cpsw_soft_resetfunction cpsw_ndo_tx_timeoutfunction cpsw_get_common_speedfunction cpsw_need_resplitfunction cpsw_split_resfunction cpsw_init_commonfunction cpsw_hwtstamp_v1function cpsw_hwtstamp_v2function cpsw_hwtstamp_setfunction cpsw_hwtstamp_getfunction cpsw_hwtstamp_getfunction cpsw_hwtstamp_setfunction cpsw_ndo_set_tx_maxratefunction cpsw_tc_to_fifofunction cpsw_shp_is_offfunction cpsw_fifo_shp_onfunction cpsw_set_fifo_bwfunction cpsw_set_fifo_rlimitfunction cpsw_set_cbsfunction cpsw_set_mqpriofunction cpsw_ndo_setup_tcfunction cpsw_cbs_resumefunction cpsw_mqprio_resumefunction cpsw_fill_rx_channelsfunction cpsw_create_rx_poolfunction cpsw_ndev_create_xdp_rxqfunction cpsw_ndev_destroy_xdp_rxqfunction cpsw_destroy_xdp_rxqsfunction cpsw_create_xdp_rxqsfunction cpsw_xdp_prog_setupfunction cpsw_ndo_bpffunction cpsw_xdp_tx_framefunction cpsw_run_xdpfunction cpsw_qos_clsflower_add_policerfunction ether_addr_equal_unalignedfunction cpsw_qos_clsflower_policer_validate
Annotated Snippet
if (cpsw->tx_irq_disabled) {
cpsw->tx_irq_disabled = false;
enable_irq(cpsw->irqs_table[1]);
}
}
return num_tx;
}
EXPORT_SYMBOL_GPL(cpsw_tx_poll);
int cpsw_rx_mq_poll(struct napi_struct *napi_rx, int budget)
{
struct cpsw_common *cpsw = napi_to_cpsw(napi_rx);
int num_rx, cur_budget, ch;
u32 ch_map;
struct cpsw_vector *rxv;
/* process every unprocessed channel */
ch_map = cpdma_ctrl_rxchs_state(cpsw->dma);
for (ch = 0, num_rx = 0; ch_map; ch_map >>= 1, ch++) {
if (!(ch_map & 0x01))
continue;
rxv = &cpsw->rxv[ch];
if (unlikely(rxv->budget > budget - num_rx))
cur_budget = budget - num_rx;
else
cur_budget = rxv->budget;
num_rx += cpdma_chan_process(rxv->ch, cur_budget);
if (num_rx >= budget)
break;
}
if (num_rx < budget) {
napi_complete_done(napi_rx, num_rx);
writel(0xff, &cpsw->wr_regs->rx_en);
}
return num_rx;
}
EXPORT_SYMBOL_GPL(cpsw_rx_mq_poll);
int cpsw_rx_poll(struct napi_struct *napi_rx, int budget)
{
struct cpsw_common *cpsw = napi_to_cpsw(napi_rx);
int num_rx;
num_rx = cpdma_chan_process(cpsw->rxv[0].ch, budget);
if (num_rx < budget) {
napi_complete_done(napi_rx, num_rx);
writel(0xff, &cpsw->wr_regs->rx_en);
if (cpsw->rx_irq_disabled) {
cpsw->rx_irq_disabled = false;
enable_irq(cpsw->irqs_table[0]);
}
}
return num_rx;
}
EXPORT_SYMBOL_GPL(cpsw_rx_poll);
void cpsw_rx_vlan_encap(struct sk_buff *skb)
{
struct cpsw_priv *priv = netdev_priv(skb->dev);
u32 rx_vlan_encap_hdr = *((u32 *)skb->data);
struct cpsw_common *cpsw = priv->cpsw;
u16 vtag, vid, prio, pkt_type;
/* Remove VLAN header encapsulation word */
skb_pull(skb, CPSW_RX_VLAN_ENCAP_HDR_SIZE);
pkt_type = (rx_vlan_encap_hdr >>
CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_SHIFT) &
CPSW_RX_VLAN_ENCAP_HDR_PKT_TYPE_MSK;
/* Ignore unknown & Priority-tagged packets*/
if (pkt_type == CPSW_RX_VLAN_ENCAP_HDR_PKT_RESERV ||
pkt_type == CPSW_RX_VLAN_ENCAP_HDR_PKT_PRIO_TAG)
return;
vid = (rx_vlan_encap_hdr >>
CPSW_RX_VLAN_ENCAP_HDR_VID_SHIFT) &
VLAN_VID_MASK;
/* Ignore vid 0 and pass packet as is */
if (!vid)
return;
/* Untag P0 packets if set for vlan */
if (!cpsw_ale_get_vlan_p0_untag(cpsw->ale, vid)) {
prio = (rx_vlan_encap_hdr >>
Annotation
- Immediate include surface: `linux/bpf.h`, `linux/bpf_trace.h`, `linux/if_ether.h`, `linux/if_vlan.h`, `linux/kmemleak.h`, `linux/module.h`, `linux/netdevice.h`, `linux/net_tstamp.h`.
- Detected declarations: `function cpsw_intr_enable`, `function cpsw_intr_disable`, `function cpsw_tx_handler`, `function cpsw_tx_interrupt`, `function cpsw_rx_interrupt`, `function cpsw_misc_interrupt`, `function cpsw_tx_mq_poll`, `function cpsw_tx_poll`, `function cpsw_rx_mq_poll`, `function cpsw_rx_poll`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.