drivers/net/ethernet/ti/icssg/icssg_classifier.c

File Facts

System

Linux kernel

Corpus path

drivers/net/ethernet/ti/icssg/icssg_classifier.c

Extension

.c

Size

14487 bytes

Lines

535

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: exported/initcall integration point

Status

integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/etherdevice.h
• linux/types.h
• linux/regmap.h
• icssg_prueth.h

Detected Declarations

• struct miig_rt_offsets
• enum ft1_cfg_type
• enum rx_class_sel_type
• function rx_class_ft1_set_start_len
• function rx_class_ft1_set_da
• function rx_class_ft1_set_da_mask
• function rx_class_ft1_cfg_set_type
• function rx_class_sel_set_type
• function rx_class_set_and
• function rx_class_set_or
• function rx_class_get_or
• function icssg_class_set_host_mac_addr
• function icssg_class_set_mac_addr
• function icssg_class_ft1_add_mcast
• function icssg_class_disable
• function icssg_class_default
• function icssg_class_promiscuous_sr1
• function icssg_class_add_mcast_sr1
• function icssg_ft1_set_mac_addr
• function frames
• export icssg_class_set_host_mac_addr
• export icssg_class_set_mac_addr
• export icssg_class_disable
• export icssg_class_default
• export icssg_class_promiscuous_sr1
• export icssg_class_add_mcast_sr1
• export icssg_ft1_set_mac_addr
• export icssg_ft3_hsr_configurations

Annotated Snippet

struct miig_rt_offsets {
	u32 mac0;
	u32 mac1;
	u32 ft1_start_len;
	u32 ft1_cfg;
	u32 ft1_slot_base;
	u32 ft3_slot_base;
	u32 ft3_p_base;
	u32 ft_rx_ptr;
	u32 rx_class_base;
	u32 rx_class_or_base;
	u32 rx_class_cfg1;
	u32 rx_class_cfg2;
	u32 rx_class_gates_base;
	u32 rx_green;
	u32 rx_rate_cfg_base;
	u32 rx_rate_src_sel0;
	u32 rx_rate_src_sel1;
	u32 tx_rate_cfg_base;
	u32 stat_base;
	u32 tx_hsr_tag;
	u32 tx_hsr_seq;
	u32 tx_vlan_type;
	u32 tx_vlan_ins;
};

/* These are the offset values for miig_rt_offsets registers */
static const struct miig_rt_offsets offs[] = {
	/* PRU0 */
	{
		0x8,
		0xc,
		0x80,
		0x84,
		0x88,
		0x108,
		0x308,
		0x408,
		0x40c,
		0x410,
		0x48c,
		0x490,
		0x494,
		0x4d4,
		0x4e4,
		0x504,
		0x508,
		0x50c,
		0x54c,
		0x63c,
		0x640,
		0x644,
		0x648,
	},
	/* PRU1 */
	{
		0x10,
		0x14,
		0x64c,
		0x650,
		0x654,
		0x6d4,
		0x8d4,
		0x9d4,
		0x9d8,
		0x9dc,
		0xa58,
		0xa5c,
		0xa60,
		0xaa0,
		0xab0,
		0xad0,
		0xad4,
		0xad8,
		0xb18,
		0xc08,
		0xc0c,
		0xc10,
		0xc14,
	},
};

static void rx_class_ft1_set_start_len(struct regmap *miig_rt, int slice,
				       u16 start, u8 len)
{
	u32 offset, val;

	offset = offs[slice].ft1_start_len;
	val = FT1_LEN(len) | FT1_START(start);
	regmap_write(miig_rt, offset, val);

Annotation

• Immediate include surface: `linux/etherdevice.h`, `linux/types.h`, `linux/regmap.h`, `icssg_prueth.h`.
• Detected declarations: `struct miig_rt_offsets`, `enum ft1_cfg_type`, `enum rx_class_sel_type`, `function rx_class_ft1_set_start_len`, `function rx_class_ft1_set_da`, `function rx_class_ft1_set_da_mask`, `function rx_class_ft1_cfg_set_type`, `function rx_class_sel_set_type`, `function rx_class_set_and`, `function rx_class_set_or`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: integration implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.