drivers/net/ethernet/ti/icssg/icssg_common.c
Source file repositories/reference/linux-study-clean/drivers/net/ethernet/ti/icssg/icssg_common.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ethernet/ti/icssg/icssg_common.c- Extension
.c- Size
- 50372 bytes
- Lines
- 1882
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dma-mapping.hlinux/dma/ti-cppi5.hlinux/etherdevice.hlinux/interrupt.hlinux/kernel.hlinux/of.hlinux/of_mdio.hlinux/phy.hlinux/remoteproc/pruss.hlinux/regmap.hlinux/remoteproc.hicssg_prueth.h../k3-cppi-desc-pool.h
Detected Declarations
function Copyrightfunction prueth_cleanup_tx_chnsfunction prueth_ndev_del_tx_napifunction emac_xsk_xmit_zcfunction prueth_xmit_freefunction emac_tx_complete_packetsfunction emac_tx_timer_callbackfunction emac_napi_tx_pollfunction prueth_tx_irqfunction prueth_ndev_add_tx_napifunction prueth_init_tx_chnsfunction prueth_init_rx_chnsfunction prueth_dma_rx_push_mappedfunction icssg_ts_to_nsfunction emac_rx_timestampfunction emac_xmit_xdp_framefunction emac_run_xdpfunction prueth_dma_rx_push_mapped_zcfunction prueth_rx_alloc_zcfunction emac_dispatch_skb_zcfunction emac_rx_packet_zcfunction emac_rx_packetfunction prueth_rx_cleanupfunction prueth_tx_ts_cookie_getfunction emac_tx_complete_packetsfunction prueth_tx_cleanupfunction prueth_rx_irqfunction prueth_cleanup_tx_tsfunction icssg_napi_rx_pollfunction prueth_prepare_rx_chanfunction prueth_reset_tx_chanfunction prueth_reset_rx_chanfunction icssg_ndo_tx_timeoutfunction icssg_ndo_set_ts_configfunction icssg_ndo_get_ts_configfunction icssg_ndo_get_stats64function icssg_ndo_get_phys_port_namefunction prueth_node_portfunction prueth_node_macfunction prueth_netdev_exitfunction prueth_get_coresfunction prueth_put_coresfunction prueth_suspendfunction prueth_resumeexport prueth_cleanup_rx_chnsexport prueth_cleanup_tx_chnsexport prueth_ndev_del_tx_napiexport prueth_xmit_free
Annotated Snippet
if (ret) {
ndev->stats.tx_errors++;
k3_cppi_desc_pool_free(tx_chn->desc_pool, host_desc);
break;
}
num_tx++;
}
xsk_tx_release(tx_chn->xsk_pool);
return num_tx;
}
void prueth_xmit_free(struct prueth_tx_chn *tx_chn,
struct cppi5_host_desc_t *desc)
{
struct cppi5_host_desc_t *first_desc, *next_desc;
dma_addr_t buf_dma, next_desc_dma;
struct prueth_swdata *swdata;
u32 buf_dma_len;
first_desc = desc;
next_desc = first_desc;
swdata = cppi5_hdesc_get_swdata(first_desc);
if (swdata->type == PRUETH_SWDATA_XSK)
goto free_pool;
cppi5_hdesc_get_obuf(first_desc, &buf_dma, &buf_dma_len);
k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &buf_dma);
dma_unmap_single(tx_chn->dma_dev, buf_dma, buf_dma_len,
DMA_TO_DEVICE);
next_desc_dma = cppi5_hdesc_get_next_hbdesc(first_desc);
k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &next_desc_dma);
while (next_desc_dma) {
next_desc = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
next_desc_dma);
cppi5_hdesc_get_obuf(next_desc, &buf_dma, &buf_dma_len);
k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &buf_dma);
dma_unmap_page(tx_chn->dma_dev, buf_dma, buf_dma_len,
DMA_TO_DEVICE);
next_desc_dma = cppi5_hdesc_get_next_hbdesc(next_desc);
k3_udma_glue_tx_cppi5_to_dma_addr(tx_chn->tx_chn, &next_desc_dma);
k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
}
free_pool:
k3_cppi_desc_pool_free(tx_chn->desc_pool, first_desc);
}
EXPORT_SYMBOL_GPL(prueth_xmit_free);
int emac_tx_complete_packets(struct prueth_emac *emac, int chn,
int budget, bool *tdown)
{
struct net_device *ndev = emac->ndev;
struct cppi5_host_desc_t *desc_tx;
struct netdev_queue *netif_txq;
struct prueth_swdata *swdata;
struct prueth_tx_chn *tx_chn;
unsigned int total_bytes = 0;
int xsk_frames_done = 0;
struct xdp_frame *xdpf;
unsigned int pkt_len;
struct sk_buff *skb;
dma_addr_t desc_dma;
int res, num_tx = 0;
tx_chn = &emac->tx_chns[chn];
while (true) {
res = k3_udma_glue_pop_tx_chn(tx_chn->tx_chn, &desc_dma);
if (res == -ENODATA)
break;
/* teardown completion */
if (cppi5_desc_is_tdcm(desc_dma)) {
if (atomic_dec_and_test(&emac->tdown_cnt))
complete(&emac->tdown_complete);
*tdown = true;
break;
}
desc_tx = k3_cppi_desc_pool_dma2virt(tx_chn->desc_pool,
desc_dma);
swdata = cppi5_hdesc_get_swdata(desc_tx);
Annotation
- Immediate include surface: `linux/dma-mapping.h`, `linux/dma/ti-cppi5.h`, `linux/etherdevice.h`, `linux/interrupt.h`, `linux/kernel.h`, `linux/of.h`, `linux/of_mdio.h`, `linux/phy.h`.
- Detected declarations: `function Copyright`, `function prueth_cleanup_tx_chns`, `function prueth_ndev_del_tx_napi`, `function emac_xsk_xmit_zc`, `function prueth_xmit_free`, `function emac_tx_complete_packets`, `function emac_tx_timer_callback`, `function emac_napi_tx_poll`, `function prueth_tx_irq`, `function prueth_ndev_add_tx_napi`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.