drivers/net/ethernet/via/via-rhine.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/via/via-rhine.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/via/via-rhine.c
Extension
.c
Size
70861 bytes
Lines
2639
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: operation-table or driver-model contract
Status
pattern implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

static const struct net_device_ops rhine_netdev_ops = {
	.ndo_open		 = rhine_open,
	.ndo_stop		 = rhine_close,
	.ndo_start_xmit		 = rhine_start_tx,
	.ndo_get_stats64	 = rhine_get_stats64,
	.ndo_set_rx_mode	 = rhine_set_rx_mode,
	.ndo_validate_addr	 = eth_validate_addr,
	.ndo_set_mac_address 	 = eth_mac_addr,
	.ndo_eth_ioctl		 = netdev_ioctl,
	.ndo_tx_timeout 	 = rhine_tx_timeout,
	.ndo_vlan_rx_add_vid	 = rhine_vlan_rx_add_vid,
	.ndo_vlan_rx_kill_vid	 = rhine_vlan_rx_kill_vid,
#ifdef CONFIG_NET_POLL_CONTROLLER
	.ndo_poll_controller	 = rhine_poll,
#endif
};

static int rhine_init_one_common(struct device *hwdev, u32 quirks,
				 long pioaddr, void __iomem *ioaddr, int irq)
{
	struct net_device *dev;
	struct rhine_private *rp;
	int i, rc, phy_id;
	u8 addr[ETH_ALEN];
	const char *name;

	/* this should always be supported */
	rc = dma_set_mask(hwdev, DMA_BIT_MASK(32));
	if (rc) {
		dev_err(hwdev, "32-bit DMA addresses not supported by the card!?\n");
		goto err_out;
	}

	dev = alloc_etherdev(sizeof(struct rhine_private));
	if (!dev) {
		rc = -ENOMEM;
		goto err_out;
	}
	SET_NETDEV_DEV(dev, hwdev);

	rp = netdev_priv(dev);
	rp->dev = dev;
	rp->quirks = quirks;
	rp->pioaddr = pioaddr;
	rp->base = ioaddr;
	rp->irq = irq;
	rp->msg_enable = netif_msg_init(debug, RHINE_MSG_DEFAULT);

	phy_id = rp->quirks & rqIntPHY ? 1 : 0;

	u64_stats_init(&rp->tx_stats.syncp);
	u64_stats_init(&rp->rx_stats.syncp);

	/* Get chip registers into a sane state */
	rhine_power_init(dev);
	rhine_hw_init(dev, pioaddr);

	for (i = 0; i < 6; i++)
		addr[i] = ioread8(ioaddr + StationAddr + i);
	eth_hw_addr_set(dev, addr);

	if (!is_valid_ether_addr(dev->dev_addr)) {
		/* Report it and use a random ethernet address instead */
		netdev_err(dev, "Invalid MAC address: %pM\n", dev->dev_addr);
		eth_hw_addr_random(dev);
		netdev_info(dev, "Using random MAC address: %pM\n",
			    dev->dev_addr);
	}

	/* For Rhine-I/II, phy_id is loaded from EEPROM */
	if (!phy_id)
		phy_id = ioread8(ioaddr + 0x6C);

	spin_lock_init(&rp->lock);
	mutex_init(&rp->task_lock);
	INIT_WORK(&rp->reset_task, rhine_reset_task);
	INIT_WORK(&rp->slow_event_task, rhine_slow_event_task);

	rp->mii_if.dev = dev;
	rp->mii_if.mdio_read = mdio_read;
	rp->mii_if.mdio_write = mdio_write;
	rp->mii_if.phy_id_mask = 0x1f;
	rp->mii_if.reg_num_mask = 0x1f;

	/* The chip-specific entries in the device structure. */
	dev->netdev_ops = &rhine_netdev_ops;
	dev->ethtool_ops = &netdev_ethtool_ops;
	dev->watchdog_timeo = TX_TIMEOUT;

	netif_napi_add(dev, &rp->napi, rhine_napipoll);

Annotation

Implementation Notes