drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c
Extension
.c
Size
14413 bytes
Lines
526
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (id->com_10g_code & TXGBE_SFF_10GBASESR_CAPABLE) {
			txgbe->link_port = PORT_FIBRE;
			phylink_set(modes, 10000baseSR_Full);
			__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
		}
		if (id->com_10g_code & TXGBE_SFF_10GBASELR_CAPABLE) {
			txgbe->link_port = PORT_FIBRE;
			phylink_set(modes, 10000baseLR_Full);
			__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
		}
	}

	if (phy_interface_empty(interfaces)) {
		wx_err(wx, "unsupported SFP module\n");
		return -EINVAL;
	}

	phylink_set(modes, Pause);
	phylink_set(modes, Asym_Pause);
	phylink_set(modes, FIBRE);

	if (!linkmode_equal(txgbe->link_support, modes)) {
		linkmode_copy(txgbe->link_support, modes);
		phy_interface_and(txgbe->link_interfaces,
				  wx->phylink_config.supported_interfaces,
				  interfaces);
		linkmode_copy(txgbe->advertising, modes);

		set_bit(WX_FLAG_NEED_LINK_CONFIG, wx->flags);
	}

	return 0;
}

static int txgbe_qsfp_to_linkmodes(struct wx *wx, struct txgbe_sff_id *id)
{
	__ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = { 0, };
	DECLARE_PHY_INTERFACE_MASK_ZERO(interfaces);
	struct txgbe *txgbe = wx->priv;

	if (id->transceiver_type & TXGBE_SFF_ETHERNET_40G_CR4) {
		txgbe->link_port = PORT_DA;
		phylink_set(modes, Autoneg);
		phylink_set(modes, 40000baseCR4_Full);
		phylink_set(modes, 10000baseCR_Full);
		__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);
		__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
	}
	if (id->transceiver_type & TXGBE_SFF_ETHERNET_40G_SR4) {
		txgbe->link_port = PORT_FIBRE;
		phylink_set(modes, 40000baseSR4_Full);
		__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);
	}
	if (id->transceiver_type & TXGBE_SFF_ETHERNET_40G_LR4) {
		txgbe->link_port = PORT_FIBRE;
		phylink_set(modes, 40000baseLR4_Full);
		__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);
	}
	if (id->transceiver_type & TXGBE_SFF_ETHERNET_40G_ACTIVE) {
		txgbe->link_port = PORT_DA;
		phylink_set(modes, Autoneg);
		phylink_set(modes, 40000baseCR4_Full);
		__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);
	}
	if (id->transceiver_type & TXGBE_SFF_ETHERNET_RSRVD) {
		if (id->sff_opt1 & TXGBE_SFF_ETHERNET_100G_CR4) {
			txgbe->link_port = PORT_DA;
			phylink_set(modes, Autoneg);
			phylink_set(modes, 40000baseCR4_Full);
			phylink_set(modes, 25000baseCR_Full);
			phylink_set(modes, 10000baseCR_Full);
			__set_bit(PHY_INTERFACE_MODE_XLGMII, interfaces);
			__set_bit(PHY_INTERFACE_MODE_25GBASER, interfaces);
			__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
		}
	}

	if (phy_interface_empty(interfaces)) {
		wx_err(wx, "unsupported QSFP module\n");
		return -EINVAL;
	}

	phylink_set(modes, Pause);
	phylink_set(modes, Asym_Pause);
	phylink_set(modes, FIBRE);

	if (!linkmode_equal(txgbe->link_support, modes)) {
		linkmode_copy(txgbe->link_support, modes);
		phy_interface_and(txgbe->link_interfaces,
				  wx->phylink_config.supported_interfaces,

Annotation

Implementation Notes