drivers/net/ethernet/xilinx/xilinx_axienet.h

Source file repositories/reference/linux-study-clean/drivers/net/ethernet/xilinx/xilinx_axienet.h

File Facts

System
Linux kernel
Corpus path
drivers/net/ethernet/xilinx/xilinx_axienet.h
Extension
.h
Size
28558 bytes
Lines
745
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct axidma_bd {
	u32 next;	/* Physical address of next buffer descriptor */
	u32 next_msb;	/* high 32 bits for IP >= v7.1, reserved on older IP */
	u32 phys;
	u32 phys_msb;	/* for IP >= v7.1, reserved for older IP */
	u32 reserved3;
	u32 reserved4;
	u32 cntrl;
	u32 status;
	u32 app0;
	u32 app1;	/* TX start << 16 | insert */
	u32 app2;	/* TX csum seed */
	u32 app3;
	u32 app4;   /* Last field used by HW */
	struct sk_buff *skb;
} __aligned(XAXIDMA_BD_MINIMUM_ALIGNMENT);

#define XAE_NUM_MISC_CLOCKS 3

/**
 * struct skbuf_dma_descriptor - skb for each dma descriptor
 * @sgl: Pointer for sglist.
 * @desc: Pointer to dma descriptor.
 * @dma_address: dma address of sglist.
 * @skb: Pointer to SKB transferred using DMA
 * @sg_len: number of entries in the sglist.
 */
struct skbuf_dma_descriptor {
	struct scatterlist sgl[MAX_SKB_FRAGS + 1];
	struct dma_async_tx_descriptor *desc;
	dma_addr_t dma_address;
	struct sk_buff *skb;
	int sg_len;
};

/**
 * struct axienet_local - axienet private per device data
 * @ndev:	Pointer for net_device to which it will be attached.
 * @dev:	Pointer to device structure
 * @phylink:	Pointer to phylink instance
 * @phylink_config: phylink configuration settings
 * @pcs_phy:	Reference to PCS/PMA PHY if used
 * @pcs:	phylink pcs structure for PCS PHY
 * @switch_x_sgmii: Whether switchable 1000BaseX/SGMII mode is enabled in the core
 * @axi_clk:	AXI4-Lite bus clock
 * @misc_clks:	Misc ethernet clocks (AXI4-Stream, Ref, MGT clocks)
 * @mii_bus:	Pointer to MII bus structure
 * @mii_clk_div: MII bus clock divider value
 * @regs_start: Resource start for axienet device addresses
 * @regs:	Base address for the axienet_local device address space
 * @dma_regs:	Base address for the axidma device address space
 * @napi_rx:	NAPI RX control structure
 * @rx_dim:     DIM state for the receive queue
 * @rx_dim_enabled: Whether DIM is enabled or not
 * @rx_irqs:    Number of interrupts
 * @rx_cr_lock: Lock protecting @rx_dma_cr, its register, and @rx_dma_started
 * @rx_dma_cr:  Nominal content of RX DMA control register
 * @rx_dma_started: Set when RX DMA is started
 * @rx_bd_v:	Virtual address of the RX buffer descriptor ring
 * @rx_bd_p:	Physical address(start address) of the RX buffer descr. ring
 * @rx_bd_num:	Size of RX buffer descriptor ring
 * @rx_bd_ci:	Stores the index of the Rx buffer descriptor in the ring being
 *		accessed currently.
 * @rx_packets: RX packet count for statistics
 * @rx_bytes:	RX byte count for statistics
 * @rx_stat_sync: Synchronization object for RX stats
 * @napi_tx:	NAPI TX control structure
 * @tx_cr_lock: Lock protecting @tx_dma_cr, its register, and @tx_dma_started
 * @tx_dma_cr:  Nominal content of TX DMA control register
 * @tx_dma_started: Set when TX DMA is started
 * @tx_bd_v:	Virtual address of the TX buffer descriptor ring
 * @tx_bd_p:	Physical address(start address) of the TX buffer descr. ring
 * @tx_bd_num:	Size of TX buffer descriptor ring
 * @tx_bd_ci:	Stores the next Tx buffer descriptor in the ring that may be
 *		complete. Only updated at runtime by TX NAPI poll.
 * @tx_bd_tail:	Stores the index of the next Tx buffer descriptor in the ring
 *              to be populated.
 * @tx_packets: TX packet count for statistics
 * @tx_bytes:	TX byte count for statistics
 * @tx_stat_sync: Synchronization object for TX stats
 * @hw_stat_base: Base offset for statistics counters. This may be nonzero if
 *                the statistics counteres were reset or wrapped around.
 * @hw_last_counter: Last-seen value of each statistic counter
 * @reset_in_progress: Set while we are performing a reset and statistics
 *                     counters may be invalid
 * @hw_stats_seqcount: Sequence counter for @hw_stat_base, @hw_last_counter,
 *                     and @reset_in_progress.
 * @stats_lock: Lock for @hw_stats_seqcount
 * @stats_work: Work for reading the hardware statistics counters often enough
 *              to catch overflows.

Annotation

Implementation Notes