drivers/net/fddi/defza.h
Source file repositories/reference/linux-study-clean/drivers/net/fddi/defza.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/fddi/defza.h- Extension
.h- Size
- 31310 bytes
- Lines
- 793
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/compiler.hlinux/if_fddi.hlinux/spinlock.hlinux/timer.hlinux/types.h
Detected Declarations
struct fza_regsstruct fza_ring_cmdstruct fza_ring_unsstruct fza_ring_rmc_txstruct fza_buffer_txstruct fza_ring_hst_rxstruct fza_ring_smtstruct fza_counterstruct fza_countersstruct fza_cmd_initstruct fza_cmd_camstruct fza_cmd_paramstruct fza_cmd_modpromstruct fza_cmd_setcharstruct fza_cmd_rdcntrstruct fza_cmd_statusstruct fza_privatestruct fza_fddihdr
Annotated Snippet
struct fza_regs {
u8 pad0[FZA_RESET_PAD];
u16 reset; /* reset register */
u8 pad1[FZA_INT_EVENT_PAD];
u16 int_event; /* interrupt event register */
u16 status; /* status register */
u16 int_mask; /* interrupt mask register */
u8 pad2[FZA_CONTROL_A_PAD];
u16 control_a; /* control A register */
u16 control_b; /* control B register */
};
/* Command descriptor ring entry. */
struct fza_ring_cmd {
u32 cmd_own; /* bit 31: ownership, bits [30:0]: command */
u32 stat; /* command status */
u32 buffer; /* address of the buffer in the FZA space */
u32 pad0;
};
#define FZA_RING_CMD 0x200400 /* command ring address */
#define FZA_RING_CMD_SIZE 0x40 /* command descriptor ring
* size
*/
/* Command constants. */
#define FZA_RING_CMD_MASK 0x7fffffff
#define FZA_RING_CMD_NOP 0x00000000 /* nop */
#define FZA_RING_CMD_INIT 0x00000001 /* initialize */
#define FZA_RING_CMD_MODCAM 0x00000002 /* modify CAM */
#define FZA_RING_CMD_PARAM 0x00000003 /* set system parameters */
#define FZA_RING_CMD_MODPROM 0x00000004 /* modify promiscuous mode */
#define FZA_RING_CMD_SETCHAR 0x00000005 /* set link characteristics */
#define FZA_RING_CMD_RDCNTR 0x00000006 /* read counters */
#define FZA_RING_CMD_STATUS 0x00000007 /* get link status */
#define FZA_RING_CMD_RDCAM 0x00000008 /* read CAM */
/* Command status constants. */
#define FZA_RING_STAT_SUCCESS 0x00000000
/* Unsolicited event descriptor ring entry. */
struct fza_ring_uns {
u32 own; /* bit 31: ownership, bits [30:0]: reserved */
u32 id; /* event ID */
u32 buffer; /* address of the buffer in the FZA space */
u32 pad0; /* reserved */
};
#define FZA_RING_UNS 0x200800 /* unsolicited ring address */
#define FZA_RING_UNS_SIZE 0x40 /* unsolicited descriptor ring
* size
*/
/* Unsolicited event constants. */
#define FZA_RING_UNS_UND 0x00000000 /* undefined event ID */
#define FZA_RING_UNS_INIT_IN 0x00000001 /* ring init initiated */
#define FZA_RING_UNS_INIT_RX 0x00000002 /* ring init received */
#define FZA_RING_UNS_BEAC_IN 0x00000003 /* ring beaconing initiated */
#define FZA_RING_UNS_DUP_ADDR 0x00000004 /* duplicate address detected */
#define FZA_RING_UNS_DUP_TOK 0x00000005 /* duplicate token detected */
#define FZA_RING_UNS_PURG_ERR 0x00000006 /* ring purger error */
#define FZA_RING_UNS_STRIP_ERR 0x00000007 /* bridge strip error */
#define FZA_RING_UNS_OP_OSC 0x00000008 /* ring op oscillation */
#define FZA_RING_UNS_BEAC_RX 0x00000009 /* directed beacon received */
#define FZA_RING_UNS_PCT_IN 0x0000000a /* PC trace initiated */
#define FZA_RING_UNS_PCT_RX 0x0000000b /* PC trace received */
#define FZA_RING_UNS_TX_UNDER 0x0000000c /* transmit underrun */
#define FZA_RING_UNS_TX_FAIL 0x0000000d /* transmit failure */
#define FZA_RING_UNS_RX_OVER 0x0000000e /* receive overrun */
/* RMC (Ring Memory Control) transmit descriptor ring entry. */
struct fza_ring_rmc_tx {
u32 rmc; /* RMC information */
u32 avl; /* available for host (unused by RMC) */
u32 own; /* bit 31: ownership, bits [30:0]: reserved */
u32 pad0; /* reserved */
};
#define FZA_TX_BUFFER_ADDR(x) (0x200000 | (((x) & 0xffff) << 5))
#define FZA_TX_BUFFER_SIZE 512
struct fza_buffer_tx {
u32 data[FZA_TX_BUFFER_SIZE / sizeof(u32)];
};
/* Transmit ring RMC constants. */
#define FZA_RING_TX_SOP 0x80000000 /* start of packet */
#define FZA_RING_TX_EOP 0x40000000 /* end of packet */
#define FZA_RING_TX_DTP 0x20000000 /* discard this packet */
#define FZA_RING_TX_VBC 0x10000000 /* valid buffer byte count */
#define FZA_RING_TX_DCC_MASK 0x0f000000 /* DMA completion code */
#define FZA_RING_TX_DCC_SUCCESS 0x01000000 /* transmit succeeded */
#define FZA_RING_TX_DCC_DTP_SOP 0x02000000 /* DTP set at SOP */
Annotation
- Immediate include surface: `linux/compiler.h`, `linux/if_fddi.h`, `linux/spinlock.h`, `linux/timer.h`, `linux/types.h`.
- Detected declarations: `struct fza_regs`, `struct fza_ring_cmd`, `struct fza_ring_uns`, `struct fza_ring_rmc_tx`, `struct fza_buffer_tx`, `struct fza_ring_hst_rx`, `struct fza_ring_smt`, `struct fza_counter`, `struct fza_counters`, `struct fza_cmd_init`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.