drivers/net/hyperv/hyperv_net.h
Source file repositories/reference/linux-study-clean/drivers/net/hyperv/hyperv_net.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/hyperv/hyperv_net.h- Extension
.h- Size
- 45319 bytes
- Lines
- 1822
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/list.hlinux/hyperv.hlinux/rndis.hlinux/jhash.hnet/xdp.h
Detected Declarations
struct ndis_obj_headerstruct ndis_recv_scale_capstruct ndis_recv_scale_paramstruct ndis_tcp_ip_checksum_infostruct ndis_pkt_8021q_infostruct hv_netvsc_packetstruct netvsc_device_infostruct rndis_devicestruct rndis_messagestruct ndis_offload_paramsstruct netvsc_devicestruct netvsc_channelstruct net_device_contextstruct nvsp_message_headerstruct nvsp_message_initstruct nvsp_message_init_completestruct nvsp_1_message_send_ndis_versionstruct nvsp_1_message_send_receive_bufferstruct nvsp_1_receive_buffer_sectionstruct nvsp_1_message_send_receive_buffer_completestruct nvsp_1_message_revoke_receive_bufferstruct nvsp_1_message_send_send_bufferstruct nvsp_1_message_send_send_buffer_completestruct nvsp_1_message_revoke_send_bufferstruct nvsp_1_message_send_rndis_packetstruct nvsp_1_message_send_rndis_packet_completestruct nvsp_2_vsc_capabilitystruct nvsp_2_send_ndis_configstruct nvsp_2_alloc_rxbufstruct nvsp_2_alloc_rxbuf_compstruct nvsp_2_free_rxbufstruct nvsp_4_send_vf_associationstruct nvsp_4_sw_datapathstruct nvsp_5_subchannel_requeststruct nvsp_5_subchannel_completestruct nvsp_5_send_indirect_tablestruct grp_affinitystruct nvsp_6_pd_api_reqstruct __packedstruct __packedstruct __packedstruct __packedstruct __packedstruct __packedstruct __packedstruct __packedstruct __packedstruct nvsp_6_pd_api_comp
Annotated Snippet
struct ndis_obj_header {
u8 type;
u8 rev;
u16 size;
} __packed;
/* ndis_recv_scale_cap/cap_flag */
#define NDIS_RSS_CAPS_MESSAGE_SIGNALED_INTERRUPTS 0x01000000
#define NDIS_RSS_CAPS_CLASSIFICATION_AT_ISR 0x02000000
#define NDIS_RSS_CAPS_CLASSIFICATION_AT_DPC 0x04000000
#define NDIS_RSS_CAPS_USING_MSI_X 0x08000000
#define NDIS_RSS_CAPS_RSS_AVAILABLE_ON_PORTS 0x10000000
#define NDIS_RSS_CAPS_SUPPORTS_MSI_X 0x20000000
#define NDIS_RSS_CAPS_HASH_TYPE_TCP_IPV4 0x00000100
#define NDIS_RSS_CAPS_HASH_TYPE_TCP_IPV6 0x00000200
#define NDIS_RSS_CAPS_HASH_TYPE_TCP_IPV6_EX 0x00000400
struct ndis_recv_scale_cap { /* NDIS_RECEIVE_SCALE_CAPABILITIES */
struct ndis_obj_header hdr;
u32 cap_flag;
u32 num_int_msg;
u32 num_recv_que;
u16 num_indirect_tabent;
} __packed;
/* ndis_recv_scale_param flags */
#define NDIS_RSS_PARAM_FLAG_BASE_CPU_UNCHANGED 0x0001
#define NDIS_RSS_PARAM_FLAG_HASH_INFO_UNCHANGED 0x0002
#define NDIS_RSS_PARAM_FLAG_ITABLE_UNCHANGED 0x0004
#define NDIS_RSS_PARAM_FLAG_HASH_KEY_UNCHANGED 0x0008
#define NDIS_RSS_PARAM_FLAG_DISABLE_RSS 0x0010
/* Hash info bits */
#define NDIS_HASH_FUNC_TOEPLITZ 0x00000001
#define NDIS_HASH_IPV4 0x00000100
#define NDIS_HASH_TCP_IPV4 0x00000200
#define NDIS_HASH_IPV6 0x00000400
#define NDIS_HASH_IPV6_EX 0x00000800
#define NDIS_HASH_TCP_IPV6 0x00001000
#define NDIS_HASH_TCP_IPV6_EX 0x00002000
#define NDIS_RSS_INDIRECTION_TABLE_MAX_SIZE_REVISION_2 (128 * 4)
#define NDIS_RSS_HASH_SECRET_KEY_MAX_SIZE_REVISION_2 40
#define ITAB_NUM 128
#define ITAB_NUM_MAX 256
struct ndis_recv_scale_param { /* NDIS_RECEIVE_SCALE_PARAMETERS */
struct ndis_obj_header hdr;
/* Qualifies the rest of the information */
u16 flag;
/* The base CPU number to do receive processing. not used */
u16 base_cpu_number;
/* This describes the hash function and type being enabled */
u32 hashinfo;
/* The size of indirection table array */
u16 indirect_tabsize;
/* The offset of the indirection table from the beginning of this
* structure
*/
u32 indirect_taboffset;
/* The size of the hash secret key */
u16 hashkey_size;
/* The offset of the secret key from the beginning of this structure */
u32 hashkey_offset;
u32 processor_masks_offset;
u32 num_processor_masks;
u32 processor_masks_entry_size;
};
struct ndis_tcp_ip_checksum_info {
union {
struct {
u32 is_ipv4:1;
u32 is_ipv6:1;
u32 tcp_checksum:1;
u32 udp_checksum:1;
u32 ip_header_checksum:1;
u32 reserved:11;
u32 tcp_header_offset:10;
} transmit;
Annotation
- Immediate include surface: `linux/list.h`, `linux/hyperv.h`, `linux/rndis.h`, `linux/jhash.h`, `net/xdp.h`.
- Detected declarations: `struct ndis_obj_header`, `struct ndis_recv_scale_cap`, `struct ndis_recv_scale_param`, `struct ndis_tcp_ip_checksum_info`, `struct ndis_pkt_8021q_info`, `struct hv_netvsc_packet`, `struct netvsc_device_info`, `struct rndis_device`, `struct rndis_message`, `struct ndis_offload_params`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.