drivers/net/ieee802154/mcr20a.c

Source file repositories/reference/linux-study-clean/drivers/net/ieee802154/mcr20a.c

File Facts

System
Linux kernel
Corpus path
drivers/net/ieee802154/mcr20a.c
Extension
.c
Size
33240 bytes
Lines
1363
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct mcr20a_local {
	struct spi_device *spi;

	struct ieee802154_hw *hw;
	struct regmap *regmap_dar;
	struct regmap *regmap_iar;

	u8 *buf;

	bool is_tx;

	/* for writing tx buffer */
	struct spi_message tx_buf_msg;
	u8 tx_header[1];
	/* burst buffer write command */
	struct spi_transfer tx_xfer_header;
	u8 tx_len[1];
	/* len of tx packet */
	struct spi_transfer tx_xfer_len;
	/* data of tx packet */
	struct spi_transfer tx_xfer_buf;
	struct sk_buff *tx_skb;

	/* for read length rxfifo */
	struct spi_message reg_msg;
	u8 reg_cmd[1];
	u8 reg_data[MCR20A_IRQSTS_NUM];
	struct spi_transfer reg_xfer_cmd;
	struct spi_transfer reg_xfer_data;

	/* receive handling */
	struct spi_message rx_buf_msg;
	u8 rx_header[1];
	struct spi_transfer rx_xfer_header;
	u8 rx_lqi[1];
	struct spi_transfer rx_xfer_lqi;
	u8 rx_buf[MCR20A_MAX_BUF];
	struct spi_transfer rx_xfer_buf;

	/* isr handling for reading intstat */
	struct spi_message irq_msg;
	u8 irq_header[1];
	u8 irq_data[MCR20A_IRQSTS_NUM];
	struct spi_transfer irq_xfer_data;
	struct spi_transfer irq_xfer_header;
};

static void
mcr20a_write_tx_buf_complete(void *context)
{
	struct mcr20a_local *lp = context;
	int ret;

	dev_dbg(printdev(lp), "%s\n", __func__);

	lp->reg_msg.complete = NULL;
	lp->reg_cmd[0]	= MCR20A_WRITE_REG(DAR_PHY_CTRL1);
	lp->reg_data[0] = MCR20A_XCVSEQ_TX;
	lp->reg_xfer_data.len = 1;

	ret = spi_async(lp->spi, &lp->reg_msg);
	if (ret)
		dev_err(printdev(lp), "failed to set SEQ TX\n");
}

static int
mcr20a_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
{
	struct mcr20a_local *lp = hw->priv;

	dev_dbg(printdev(lp), "%s\n", __func__);

	lp->tx_skb = skb;

	print_hex_dump_debug("mcr20a tx: ", DUMP_PREFIX_OFFSET, 16, 1,
			     skb->data, skb->len, 0);

	lp->is_tx = 1;

	lp->reg_msg.complete	= NULL;
	lp->reg_cmd[0]		= MCR20A_WRITE_REG(DAR_PHY_CTRL1);
	lp->reg_data[0]		= MCR20A_XCVSEQ_IDLE;
	lp->reg_xfer_data.len	= 1;

	return spi_async(lp->spi, &lp->reg_msg);
}

static int
mcr20a_ed(struct ieee802154_hw *hw, u8 *level)
{

Annotation

Implementation Notes