drivers/net/ipa/gsi.c
Source file repositories/reference/linux-study-clean/drivers/net/ipa/gsi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ipa/gsi.c- Extension
.c- Size
- 69404 bytes
- Lines
- 2435
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.hlinux/bug.hlinux/completion.hlinux/interrupt.hlinux/mutex.hlinux/netdevice.hlinux/platform_device.hlinux/types.hgsi.hgsi_private.hgsi_reg.hgsi_trans.hipa_data.hipa_gsi.hipa_version.hreg.h
Detected Declarations
struct gsi_eventstruct gsi_channel_scratch_gpifunction gsi_validate_buildfunction gsi_channel_idfunction gsi_channel_initializedfunction ch_c_cntxt_0_type_encodefunction gsi_irq_type_updatefunction gsi_irq_type_enablefunction gsi_irq_type_disablefunction gsi_irq_ev_ctrl_enablefunction gsi_irq_ev_ctrl_disablefunction gsi_irq_ch_ctrl_enablefunction gsi_irq_ch_ctrl_disablefunction gsi_irq_ieob_enable_onefunction gsi_irq_ieob_disablefunction gsi_irq_ieob_disable_onefunction gsi_irq_enablefunction gsi_irq_disablefunction gsi_ring_addrfunction gsi_ring_indexfunction gsi_commandfunction gsi_evt_ring_statefunction gsi_evt_ring_commandfunction gsi_evt_ring_alloc_commandfunction gsi_evt_ring_reset_commandfunction gsi_evt_ring_de_alloc_commandfunction gsi_channel_statefunction gsi_channel_commandfunction gsi_channel_alloc_commandfunction gsi_channel_start_commandfunction gsi_channel_stop_commandfunction gsi_channel_reset_commandfunction gsi_channel_de_alloc_commandfunction argumentfunction gsi_evt_ring_programfunction gsi_channel_trans_quiescefunction gsi_channel_programfunction __gsi_channel_startfunction gsi_channel_startfunction gsi_channel_stop_retryfunction __gsi_channel_stopfunction gsi_channel_stopfunction gsi_channel_resetfunction gsi_channel_suspendfunction gsi_channel_resumefunction gsi_suspendfunction gsi_resumefunction gsi_trans_tx_committed
Annotated Snippet
struct gsi_event {
__le64 xfer_ptr;
__le16 len;
u8 reserved1;
u8 code;
__le16 reserved2;
u8 type;
u8 chid;
};
/** gsi_channel_scratch_gpi - GPI protocol scratch register
* @max_outstanding_tre:
* Defines the maximum number of TREs allowed in a single transaction
* on a channel (in bytes). This determines the amount of prefetch
* performed by the hardware. We configure this to equal the size of
* the TLV FIFO for the channel.
* @outstanding_threshold:
* Defines the threshold (in bytes) determining when the sequencer
* should update the channel doorbell. We configure this to equal
* the size of two TREs.
*/
struct gsi_channel_scratch_gpi {
u64 reserved1;
u16 reserved2;
u16 max_outstanding_tre;
u16 reserved3;
u16 outstanding_threshold;
};
/** gsi_channel_scratch - channel scratch configuration area
*
* The exact interpretation of this register is protocol-specific.
* We only use GPI channels; see struct gsi_channel_scratch_gpi, above.
*/
union gsi_channel_scratch {
struct gsi_channel_scratch_gpi gpi;
struct {
u32 word1;
u32 word2;
u32 word3;
u32 word4;
} data;
};
/* Check things that can be validated at build time. */
static void gsi_validate_build(void)
{
/* This is used as a divisor */
BUILD_BUG_ON(!GSI_RING_ELEMENT_SIZE);
/* Code assumes the size of channel and event ring element are
* the same (and fixed). Make sure the size of an event ring
* element is what's expected.
*/
BUILD_BUG_ON(sizeof(struct gsi_event) != GSI_RING_ELEMENT_SIZE);
/* Hardware requires a 2^n ring size. We ensure the number of
* elements in an event ring is a power of 2 elsewhere; this
* ensure the elements themselves meet the requirement.
*/
BUILD_BUG_ON(!is_power_of_2(GSI_RING_ELEMENT_SIZE));
}
/* Return the channel id associated with a given channel */
static u32 gsi_channel_id(struct gsi_channel *channel)
{
return channel - &channel->gsi->channel[0];
}
/* An initialized channel has a non-null GSI pointer */
static bool gsi_channel_initialized(struct gsi_channel *channel)
{
return !!channel->gsi;
}
/* Encode the channel protocol for the CH_C_CNTXT_0 register */
static u32 ch_c_cntxt_0_type_encode(enum ipa_version version,
const struct reg *reg,
enum gsi_channel_type type)
{
u32 val;
val = reg_encode(reg, CHTYPE_PROTOCOL, type);
if (version < IPA_VERSION_4_5 || version >= IPA_VERSION_5_0)
return val;
type >>= hweight32(reg_fmask(reg, CHTYPE_PROTOCOL));
return val | reg_encode(reg, CHTYPE_PROTOCOL_MSB, type);
}
Annotation
- Immediate include surface: `linux/bits.h`, `linux/bug.h`, `linux/completion.h`, `linux/interrupt.h`, `linux/mutex.h`, `linux/netdevice.h`, `linux/platform_device.h`, `linux/types.h`.
- Detected declarations: `struct gsi_event`, `struct gsi_channel_scratch_gpi`, `function gsi_validate_build`, `function gsi_channel_id`, `function gsi_channel_initialized`, `function ch_c_cntxt_0_type_encode`, `function gsi_irq_type_update`, `function gsi_irq_type_enable`, `function gsi_irq_type_disable`, `function gsi_irq_ev_ctrl_enable`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.