drivers/net/ipa/gsi_reg.h
Source file repositories/reference/linux-study-clean/drivers/net/ipa/gsi_reg.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ipa/gsi_reg.h- Extension
.h- Size
- 9927 bytes
- Lines
- 384
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bits.h
Detected Declarations
struct platform_devicestruct gsienum gsi_reg_idenum gsi_reg_ch_c_cntxt_0_field_idenum gsi_channel_typeenum gsi_reg_ch_c_cntxt_1_field_idenum gsi_reg_ch_c_qos_field_idenum gsi_prefetch_modeenum gsi_reg_ch_c_ev_ch_e_cntxt_0_field_idenum gsi_reg_ev_ch_c_cntxt_1_field_idenum gsi_reg_ch_c_ev_ch_e_cntxt_8_field_idenum gsi_reg_gsi_status_field_idenum gsi_reg_gsi_ch_cmd_field_idenum gsi_ch_cmd_opcodeenum gsi_ev_ch_cmd_field_idenum gsi_evt_cmd_opcodeenum gsi_generic_cmd_field_idenum gsi_generic_cmd_opcodeenum gsi_hw_param_2_field_idenum gsi_iram_sizeenum gsi_hw_param_4_field_idenum gsi_irq_type_idenum gsi_global_irq_idenum gsi_general_irq_idenum gsi_cntxt_intset_field_idenum gsi_error_log_field_idenum gsi_err_codeenum gsi_err_typeenum gsi_cntxt_scratch_0_field_idenum gsi_generic_ee_result
Annotated Snippet
#ifndef _GSI_REG_H_
#define _GSI_REG_H_
/* === Only "gsi.c" and "gsi_reg.c" should include this file === */
#include <linux/bits.h>
struct platform_device;
struct gsi;
/**
* DOC: GSI Registers
*
* GSI registers are located within the "gsi" address space defined by Device
* Tree. The offset of each register within that space is specified by
* symbols defined below. The GSI address space is mapped to virtual memory
* space in gsi_init(). All GSI registers are 32 bits wide.
*
* Each register type is duplicated for a number of instances of something.
* For example, each GSI channel has its own set of registers defining its
* configuration. The offset to a channel's set of registers is computed
* based on a "base" offset plus an additional "stride" amount computed
* from the channel's ID. For such registers, the offset is computed by a
* function-like macro that takes a parameter used in the computation.
*
* The offset of a register dependent on execution environment is computed
* by a macro that is supplied a parameter "ee". The "ee" value is a member
* of the gsi_ee_id enumerated type.
*
* The offset of a channel register is computed by a macro that is supplied a
* parameter "ch". The "ch" value is a channel id whose maximum value is 30
* (though the actual limit is hardware-dependent).
*
* The offset of an event register is computed by a macro that is supplied a
* parameter "ev". The "ev" value is an event id whose maximum value is 15
* (though the actual limit is hardware-dependent).
*/
/* enum gsi_reg_id - GSI register IDs */
enum gsi_reg_id {
INTER_EE_SRC_CH_IRQ_MSK, /* IPA v3.5+ */
INTER_EE_SRC_EV_CH_IRQ_MSK, /* IPA v3.5+ */
CH_C_CNTXT_0,
CH_C_CNTXT_1,
CH_C_CNTXT_2,
CH_C_CNTXT_3,
CH_C_QOS,
CH_C_SCRATCH_0,
CH_C_SCRATCH_1,
CH_C_SCRATCH_2,
CH_C_SCRATCH_3,
EV_CH_E_CNTXT_0,
EV_CH_E_CNTXT_1,
EV_CH_E_CNTXT_2,
EV_CH_E_CNTXT_3,
EV_CH_E_CNTXT_4,
EV_CH_E_CNTXT_8,
EV_CH_E_CNTXT_9,
EV_CH_E_CNTXT_10,
EV_CH_E_CNTXT_11,
EV_CH_E_CNTXT_12,
EV_CH_E_CNTXT_13,
EV_CH_E_SCRATCH_0,
EV_CH_E_SCRATCH_1,
CH_C_DOORBELL_0,
EV_CH_E_DOORBELL_0,
GSI_STATUS,
CH_CMD,
EV_CH_CMD,
GENERIC_CMD,
HW_PARAM_2, /* IPA v3.5.1+ */
HW_PARAM_4, /* IPA v5.0+ */
CNTXT_TYPE_IRQ,
CNTXT_TYPE_IRQ_MSK,
CNTXT_SRC_CH_IRQ,
CNTXT_SRC_CH_IRQ_MSK,
CNTXT_SRC_CH_IRQ_CLR,
CNTXT_SRC_EV_CH_IRQ,
CNTXT_SRC_EV_CH_IRQ_MSK,
CNTXT_SRC_EV_CH_IRQ_CLR,
CNTXT_SRC_IEOB_IRQ,
CNTXT_SRC_IEOB_IRQ_MSK,
CNTXT_SRC_IEOB_IRQ_CLR,
CNTXT_GLOB_IRQ_STTS,
CNTXT_GLOB_IRQ_EN,
CNTXT_GLOB_IRQ_CLR,
CNTXT_GSI_IRQ_STTS,
CNTXT_GSI_IRQ_EN,
CNTXT_GSI_IRQ_CLR,
Annotation
- Immediate include surface: `linux/bits.h`.
- Detected declarations: `struct platform_device`, `struct gsi`, `enum gsi_reg_id`, `enum gsi_reg_ch_c_cntxt_0_field_id`, `enum gsi_channel_type`, `enum gsi_reg_ch_c_cntxt_1_field_id`, `enum gsi_reg_ch_c_qos_field_id`, `enum gsi_prefetch_mode`, `enum gsi_reg_ch_c_ev_ch_e_cntxt_0_field_id`, `enum gsi_reg_ev_ch_c_cntxt_1_field_id`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.