drivers/net/ipa/ipa_reg.h
Source file repositories/reference/linux-study-clean/drivers/net/ipa/ipa_reg.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/ipa/ipa_reg.h- Extension
.h- Size
- 19653 bytes
- Lines
- 648
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
reg.h
Detected Declarations
struct platform_devicestruct ipaenum ipa_reg_idenum ipa_reg_comp_cfg_field_idenum ipa_reg_clkon_cfg_field_idenum ipa_reg_route_field_idenum ipa_reg_shared_mem_size_field_idenum ipa_reg_qsb_max_writes_field_idenum ipa_reg_qsb_max_reads_field_idenum ipa_reg_filt_rout_hash_field_idenum ipa_reg_filt_rout_cache_field_idenum ipa_bcr_compatenum ipa_reg_local_pkt_proc_cntxt_field_idenum ipa_reg_counter_cfg_field_idenum ipa_reg_ipa_tx_cfg_field_idenum ipa_reg_flavor_0_field_idenum ipa_reg_idle_indication_cfg_field_idenum ipa_reg_qtime_timestamp_cfg_field_idenum ipa_reg_timers_xo_clk_div_cfg_field_idenum ipa_reg_timers_pulse_gran_cfg_field_idenum ipa_pulse_granenum ipa_reg_rsrc_grp_rsrc_type_field_idenum ipa_reg_endp_init_ctrl_field_idenum ipa_reg_endp_init_cfg_field_idenum ipa_cs_offload_enenum ipa_reg_endp_init_nat_field_idenum ipa_nat_typeenum ipa_reg_endp_init_hdr_field_idenum ipa_reg_endp_init_hdr_ext_field_idenum ipa_reg_endp_init_mode_field_idenum ipa_modeenum ipa_reg_endp_init_aggr_field_idenum ipa_aggr_enenum ipa_aggr_typeenum ipa_reg_endp_init_hol_block_en_field_idenum ipa_reg_endp_init_hol_block_timer_field_idenum ipa_reg_endp_deaggr_field_idenum ipa_reg_endp_init_rsrc_grp_field_idenum ipa_reg_endp_init_seq_field_idenum ipa_seq_typeenum ipa_seq_rep_typeenum ipa_reg_endp_status_field_idenum ipa_reg_endp_filter_router_hsh_cfg_field_idenum ipa_reg_endp_cache_cfg_field_idenum ipa_irq_idenum ipa_reg_ipa_irq_uc_field_id
Annotated Snippet
#ifndef _IPA_REG_H_
#define _IPA_REG_H_
#include "reg.h"
struct platform_device;
struct ipa;
/**
* DOC: IPA Registers
*
* IPA registers are located within the "ipa-reg" address space defined by
* Device Tree. Each register has a specified offset within that space,
* which is mapped into virtual memory space in ipa_mem_init(). Each
* has a unique identifer, taken from the ipa_reg_id enumerated type.
* All IPA registers are 32 bits wide.
*
* Certain "parameterized" register types are duplicated for a number of
* instances of something. For example, each IPA endpoint has an set of
* registers defining its configuration. The offset to an endpoint's set
* of registers is computed based on an "base" offset, plus an endpoint's
* ID multiplied and a "stride" value for the register. Similarly, some
* registers have an offset that depends on execution environment. In
* this case, the stride is multiplied by a member of the gsi_ee_id
* enumerated type.
*
* Each version of IPA implements an array of ipa_reg structures indexed
* by register ID. Each entry in the array specifies the base offset and
* (for parameterized registers) a non-zero stride value. Not all versions
* of IPA define all registers. The offset for a register is returned by
* reg_offset() when the register's ipa_reg structure is supplied;
* zero is returned for an undefined register (this should never happen).
*
* Some registers encode multiple fields within them. Each field in
* such a register has a unique identifier (from an enumerated type).
* The position and width of the fields in a register are defined by
* an array of field masks, indexed by field ID. Two functions are
* used to access register fields; both take an ipa_reg structure as
* argument. To encode a value to be represented in a register field,
* the value and field ID are passed to reg_encode(). To extract
* a value encoded in a register field, the field ID is passed to
* reg_decode(). In addition, for single-bit fields, reg_bit()
* can be used to either encode the bit value, or to generate a mask
* used to extract the bit value.
*/
/* enum ipa_reg_id - IPA register IDs */
enum ipa_reg_id {
COMP_CFG,
CLKON_CFG,
ROUTE,
SHARED_MEM_SIZE,
QSB_MAX_WRITES,
QSB_MAX_READS,
FILT_ROUT_HASH_EN, /* IPA v4.2 */
FILT_ROUT_HASH_FLUSH, /* Not IPA v4.2 nor IPA v5.0+ */
FILT_ROUT_CACHE_FLUSH, /* IPA v5.0+ */
STATE_AGGR_ACTIVE,
IPA_BCR, /* Not IPA v4.5+ */
LOCAL_PKT_PROC_CNTXT,
AGGR_FORCE_CLOSE,
COUNTER_CFG, /* Not IPA v4.5+ */
IPA_TX_CFG, /* IPA v3.5+ */
FLAVOR_0, /* IPA v3.5+ */
IDLE_INDICATION_CFG, /* IPA v3.5+ */
QTIME_TIMESTAMP_CFG, /* IPA v4.5+ */
TIMERS_XO_CLK_DIV_CFG, /* IPA v4.5+ */
TIMERS_PULSE_GRAN_CFG, /* IPA v4.5+ */
SRC_RSRC_GRP_01_RSRC_TYPE,
SRC_RSRC_GRP_23_RSRC_TYPE,
SRC_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+; IPA v4.5, IPA v5.0 */
SRC_RSRC_GRP_67_RSRC_TYPE, /* Not IPA v3.5+; IPA v5.0 */
DST_RSRC_GRP_01_RSRC_TYPE,
DST_RSRC_GRP_23_RSRC_TYPE,
DST_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+; IPA v4.5, IPA v5.0 */
DST_RSRC_GRP_67_RSRC_TYPE, /* Not IPA v3.5+; IPA v5.0 */
ENDP_INIT_CTRL, /* Not IPA v4.2+ for TX, not IPA v4.0+ for RX */
ENDP_INIT_CFG,
ENDP_INIT_NAT, /* TX only */
ENDP_INIT_HDR,
ENDP_INIT_HDR_EXT,
ENDP_INIT_HDR_METADATA_MASK, /* RX only */
ENDP_INIT_MODE, /* TX only */
ENDP_INIT_AGGR,
ENDP_INIT_HOL_BLOCK_EN, /* RX only */
ENDP_INIT_HOL_BLOCK_TIMER, /* RX only */
ENDP_INIT_DEAGGR, /* TX only */
ENDP_INIT_RSRC_GRP,
ENDP_INIT_SEQ, /* TX only */
Annotation
- Immediate include surface: `reg.h`.
- Detected declarations: `struct platform_device`, `struct ipa`, `enum ipa_reg_id`, `enum ipa_reg_comp_cfg_field_id`, `enum ipa_reg_clkon_cfg_field_id`, `enum ipa_reg_route_field_id`, `enum ipa_reg_shared_mem_size_field_id`, `enum ipa_reg_qsb_max_writes_field_id`, `enum ipa_reg_qsb_max_reads_field_id`, `enum ipa_reg_filt_rout_hash_field_id`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.