drivers/net/mdio/mdio-hisi-femac.c
Source file repositories/reference/linux-study-clean/drivers/net/mdio/mdio-hisi-femac.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/mdio/mdio-hisi-femac.c- Extension
.c- Size
- 3502 bytes
- Lines
- 151
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/iopoll.hlinux/kernel.hlinux/module.hlinux/of_address.hlinux/of_mdio.hlinux/platform_device.h
Detected Declarations
struct hisi_femac_mdio_datafunction hisi_femac_mdio_wait_readyfunction hisi_femac_mdio_readfunction hisi_femac_mdio_writefunction hisi_femac_mdio_probefunction hisi_femac_mdio_remove
Annotated Snippet
struct hisi_femac_mdio_data {
struct clk *clk;
void __iomem *membase;
};
static int hisi_femac_mdio_wait_ready(struct hisi_femac_mdio_data *data)
{
u32 val;
return readl_poll_timeout(data->membase + MDIO_RWCTRL,
val, val & MDIO_RW_FINISH, 20, 10000);
}
static int hisi_femac_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
{
struct hisi_femac_mdio_data *data = bus->priv;
int ret;
ret = hisi_femac_mdio_wait_ready(data);
if (ret)
return ret;
writel((mii_id << BIT_PHY_ADDR_OFFSET) | regnum,
data->membase + MDIO_RWCTRL);
ret = hisi_femac_mdio_wait_ready(data);
if (ret)
return ret;
return readl(data->membase + MDIO_RO_DATA) & 0xFFFF;
}
static int hisi_femac_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
u16 value)
{
struct hisi_femac_mdio_data *data = bus->priv;
int ret;
ret = hisi_femac_mdio_wait_ready(data);
if (ret)
return ret;
writel(MDIO_WRITE | (value << BIT_WR_DATA_OFFSET) |
(mii_id << BIT_PHY_ADDR_OFFSET) | regnum,
data->membase + MDIO_RWCTRL);
return hisi_femac_mdio_wait_ready(data);
}
static int hisi_femac_mdio_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct mii_bus *bus;
struct hisi_femac_mdio_data *data;
int ret;
bus = mdiobus_alloc_size(sizeof(*data));
if (!bus)
return -ENOMEM;
bus->name = "hisi_femac_mii_bus";
bus->read = &hisi_femac_mdio_read;
bus->write = &hisi_femac_mdio_write;
snprintf(bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
bus->parent = &pdev->dev;
data = bus->priv;
data->membase = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(data->membase)) {
ret = PTR_ERR(data->membase);
goto err_out_free_mdiobus;
}
data->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(data->clk)) {
ret = PTR_ERR(data->clk);
goto err_out_free_mdiobus;
}
ret = clk_prepare_enable(data->clk);
if (ret)
goto err_out_free_mdiobus;
ret = of_mdiobus_register(bus, np);
if (ret)
goto err_out_disable_clk;
platform_set_drvdata(pdev, bus);
return 0;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/iopoll.h`, `linux/kernel.h`, `linux/module.h`, `linux/of_address.h`, `linux/of_mdio.h`, `linux/platform_device.h`.
- Detected declarations: `struct hisi_femac_mdio_data`, `function hisi_femac_mdio_wait_ready`, `function hisi_femac_mdio_read`, `function hisi_femac_mdio_write`, `function hisi_femac_mdio_probe`, `function hisi_femac_mdio_remove`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.