drivers/net/phy/mscc/mscc_mac.h
Source file repositories/reference/linux-study-clean/drivers/net/phy/mscc/mscc_mac.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/phy/mscc/mscc_mac.h- Extension
.h- Size
- 7639 bytes
- Lines
- 160
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _MSCC_PHY_LINE_MAC_H_
#define _MSCC_PHY_LINE_MAC_H_
#define MSCC_MAC_CFG_ENA_CFG 0x00
#define MSCC_MAC_CFG_MODE_CFG 0x01
#define MSCC_MAC_CFG_MAXLEN_CFG 0x02
#define MSCC_MAC_CFG_NUM_TAGS_CFG 0x03
#define MSCC_MAC_CFG_TAGS_CFG 0x04
#define MSCC_MAC_CFG_ADV_CHK_CFG 0x07
#define MSCC_MAC_CFG_LFS_CFG 0x08
#define MSCC_MAC_CFG_LB_CFG 0x09
#define MSCC_MAC_CFG_PKTINF_CFG 0x0a
#define MSCC_MAC_PAUSE_CFG_TX_FRAME_CTRL 0x0b
#define MSCC_MAC_PAUSE_CFG_TX_FRAME_CTRL_2 0x0c
#define MSCC_MAC_PAUSE_CFG_RX_FRAME_CTRL 0x0d
#define MSCC_MAC_PAUSE_CFG_STATE 0x0e
#define MSCC_MAC_PAUSE_CFG_MAC_ADDRESS_LSB 0x0f
#define MSCC_MAC_PAUSE_CFG_MAC_ADDRESS_MSB 0x10
#define MSCC_MAC_STATUS_RX_LANE_STICKY_0 0x11
#define MSCC_MAC_STATUS_RX_LANE_STICKY_1 0x12
#define MSCC_MAC_STATUS_TX_MONITOR_STICKY 0x13
#define MSCC_MAC_STATUS_TX_MONITOR_STICKY_MASK 0x14
#define MSCC_MAC_STATUS_STICKY 0x15
#define MSCC_MAC_STATUS_STICKY_MASK 0x16
#define MSCC_MAC_STATS_32BIT_RX_HIH_CKSM_ERR_CNT 0x17
#define MSCC_MAC_STATS_32BIT_RX_XGMII_PROT_ERR_CNT 0x18
#define MSCC_MAC_STATS_32BIT_RX_SYMBOL_ERR_CNT 0x19
#define MSCC_MAC_STATS_32BIT_RX_PAUSE_CNT 0x1a
#define MSCC_MAC_STATS_32BIT_RX_UNSUP_OPCODE_CNT 0x1b
#define MSCC_MAC_STATS_32BIT_RX_UC_CNT 0x1c
#define MSCC_MAC_STATS_32BIT_RX_MC_CNT 0x1d
#define MSCC_MAC_STATS_32BIT_RX_BC_CNT 0x1e
#define MSCC_MAC_STATS_32BIT_RX_CRC_ERR_CNT 0x1f
#define MSCC_MAC_STATS_32BIT_RX_UNDERSIZE_CNT 0x20
#define MSCC_MAC_STATS_32BIT_RX_FRAGMENTS_CNT 0x21
#define MSCC_MAC_STATS_32BIT_RX_IN_RANGE_LEN_ERR_CNT 0x22
#define MSCC_MAC_STATS_32BIT_RX_OUT_OF_RANGE_LEN_ERR_CNT 0x23
#define MSCC_MAC_STATS_32BIT_RX_OVERSIZE_CNT 0x24
#define MSCC_MAC_STATS_32BIT_RX_JABBERS_CNT 0x25
#define MSCC_MAC_STATS_32BIT_RX_SIZE64_CNT 0x26
#define MSCC_MAC_STATS_32BIT_RX_SIZE65TO127_CNT 0x27
#define MSCC_MAC_STATS_32BIT_RX_SIZE128TO255_CNT 0x28
#define MSCC_MAC_STATS_32BIT_RX_SIZE256TO511_CNT 0x29
#define MSCC_MAC_STATS_32BIT_RX_SIZE512TO1023_CNT 0x2a
#define MSCC_MAC_STATS_32BIT_RX_SIZE1024TO1518_CNT 0x2b
#define MSCC_MAC_STATS_32BIT_RX_SIZE1519TOMAX_CNT 0x2c
#define MSCC_MAC_STATS_32BIT_RX_IPG_SHRINK_CNT 0x2d
#define MSCC_MAC_STATS_32BIT_TX_PAUSE_CNT 0x2e
#define MSCC_MAC_STATS_32BIT_TX_UC_CNT 0x2f
#define MSCC_MAC_STATS_32BIT_TX_MC_CNT 0x30
#define MSCC_MAC_STATS_32BIT_TX_BC_CNT 0x31
#define MSCC_MAC_STATS_32BIT_TX_SIZE64_CNT 0x32
#define MSCC_MAC_STATS_32BIT_TX_SIZE65TO127_CNT 0x33
#define MSCC_MAC_STATS_32BIT_TX_SIZE128TO255_CNT 0x34
#define MSCC_MAC_STATS_32BIT_TX_SIZE256TO511_CNT 0x35
#define MSCC_MAC_STATS_32BIT_TX_SIZE512TO1023_CNT 0x36
#define MSCC_MAC_STATS_32BIT_TX_SIZE1024TO1518_CNT 0x37
#define MSCC_MAC_STATS_32BIT_TX_SIZE1519TOMAX_CNT 0x38
#define MSCC_MAC_STATS_40BIT_RX_BAD_BYTES_CNT 0x39
#define MSCC_MAC_STATS_40BIT_RX_BAD_BYTES_MSB_CNT 0x3a
#define MSCC_MAC_STATS_40BIT_RX_OK_BYTES_CNT 0x3b
#define MSCC_MAC_STATS_40BIT_RX_OK_BYTES_MSB_CNT 0x3c
#define MSCC_MAC_STATS_40BIT_RX_IN_BYTES_CNT 0x3d
#define MSCC_MAC_STATS_40BIT_RX_IN_BYTES_MSB_CNT 0x3e
#define MSCC_MAC_STATS_40BIT_TX_OK_BYTES_CNT 0x3f
#define MSCC_MAC_STATS_40BIT_TX_OK_BYTES_MSB_CNT 0x40
#define MSCC_MAC_STATS_40BIT_TX_OUT_BYTES_CNT 0x41
#define MSCC_MAC_STATS_40BIT_TX_OUT_BYTES_MSB_CNT 0x42
#define MSCC_MAC_CFG_ENA_CFG_RX_CLK_ENA BIT(0)
#define MSCC_MAC_CFG_ENA_CFG_TX_CLK_ENA BIT(4)
#define MSCC_MAC_CFG_ENA_CFG_RX_SW_RST BIT(8)
#define MSCC_MAC_CFG_ENA_CFG_TX_SW_RST BIT(12)
#define MSCC_MAC_CFG_ENA_CFG_RX_ENA BIT(16)
#define MSCC_MAC_CFG_ENA_CFG_TX_ENA BIT(20)
#define MSCC_MAC_CFG_MODE_CFG_FORCE_CW_UPDATE_INTERVAL(x) ((x) << 20)
#define MSCC_MAC_CFG_MODE_CFG_FORCE_CW_UPDATE_INTERVAL_M GENMASK(29, 20)
#define MSCC_MAC_CFG_MODE_CFG_FORCE_CW_UPDATE BIT(16)
#define MSCC_MAC_CFG_MODE_CFG_TUNNEL_PAUSE_FRAMES BIT(14)
#define MSCC_MAC_CFG_MODE_CFG_MAC_PREAMBLE_CFG(x) ((x) << 10)
#define MSCC_MAC_CFG_MODE_CFG_MAC_PREAMBLE_CFG_M GENMASK(12, 10)
#define MSCC_MAC_CFG_MODE_CFG_MAC_IPG_CFG BIT(6)
#define MSCC_MAC_CFG_MODE_CFG_XGMII_GEN_MODE_ENA BIT(4)
#define MSCC_MAC_CFG_MODE_CFG_HIH_CRC_CHECK BIT(2)
#define MSCC_MAC_CFG_MODE_CFG_UNDERSIZED_FRAME_DROP_DIS BIT(1)
#define MSCC_MAC_CFG_MODE_CFG_DISABLE_DIC BIT(0)
#define MSCC_MAC_CFG_MAXLEN_CFG_MAX_LEN_TAG_CHK BIT(16)
#define MSCC_MAC_CFG_MAXLEN_CFG_MAX_LEN(x) (x)Annotation
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.