drivers/net/phy/nxp-c45-tja11xx-macsec.c
Source file repositories/reference/linux-study-clean/drivers/net/phy/nxp-c45-tja11xx-macsec.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/phy/nxp-c45-tja11xx-macsec.c- Extension
.c- Size
- 45474 bytes
- Lines
- 1726
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/ethtool_netlink.hlinux/kernel.hlinux/mii.hlinux/module.hlinux/phy.hlinux/processor.hnet/dst_metadata.hnet/macsec.hnxp-c45-tja11xx.h
Detected Declarations
struct nxp_c45_sastruct nxp_c45_secystruct nxp_c45_macsecstruct nxp_c45_sa_regsstruct tja11xx_tlv_headerenum nxp_c45_sa_typefunction nxp_c45_macsec_writefunction nxp_c45_macsec_readfunction nxp_c45_macsec_read32_64function nxp_c45_macsec_read64function nxp_c45_secy_irq_enfunction nxp_c45_secy_freefunction list_for_each_entry_safefunction nxp_c45_sa_freefunction nxp_c45_sa_list_freefunction nxp_c45_sa_set_pnfunction nxp_c45_sa_set_keyfunction nxp_c45_rx_sa_clear_statsfunction nxp_c45_rx_sa_read_statsfunction nxp_c45_tx_sa_clear_statsfunction nxp_c45_tx_sa_read_statsfunction nxp_c45_rx_sa_updatefunction nxp_c45_tx_sa_updatefunction nxp_c45_set_scifunction nxp_c45_port_is_1function nxp_c45_select_secyfunction nxp_c45_secy_validfunction nxp_c45_rx_sc0_implfunction nxp_c45_mac_addr_freefunction list_for_each_entry_safefunction nxp_c45_tx_sc_en_fltfunction nxp_c45_tx_sc_set_fltfunction nxp_c45_tx_sc_updatefunction nxp_c45_tx_sc_clear_statsfunction nxp_c45_set_rx_sc0_implfunction nxp_c45_is_rx_sc0_implfunction nxp_c45_rx_sc_enfunction nxp_c45_rx_sc_updatefunction nxp_c45_rx_sc_clear_statsfunction nxp_c45_rx_sc_delfunction list_for_each_entry_safefunction nxp_c45_clear_global_statsfunction nxp_c45_macsec_enfunction nxp_c45_mdo_dev_openfunction nxp_c45_mdo_dev_stopfunction nxp_c45_mdo_add_secyfunction nxp_c45_tx_sa_nextfunction nxp_c45_mdo_upd_secy
Annotated Snippet
struct nxp_c45_sa {
void *sa;
const struct nxp_c45_sa_regs *regs;
enum nxp_c45_sa_type type;
bool is_key_a;
u8 an;
struct list_head list;
};
struct nxp_c45_secy {
struct macsec_secy *secy;
struct macsec_rx_sc *rx_sc;
struct list_head sa_list;
int secy_id;
bool rx_sc0_impl;
struct list_head list;
};
struct nxp_c45_macsec {
struct list_head secy_list;
DECLARE_BITMAP(secy_bitmap, TX_SC_MAX);
DECLARE_BITMAP(tx_sc_bitmap, TX_SC_MAX);
};
struct nxp_c45_sa_regs {
u16 cs;
u16 npn;
u16 xnpn;
u16 lnpn;
u16 lxnpn;
u16 ka;
u16 ssci;
u16 salt;
u16 ipis;
u16 ipnvs;
u16 ipos;
u16 opps;
u16 opes;
};
static const struct nxp_c45_sa_regs rx_sa_a_regs = {
.cs = MACSEC_RXSA_A_CS,
.npn = MACSEC_RXSA_A_NPN,
.xnpn = MACSEC_RXSA_A_XNPN,
.lnpn = MACSEC_RXSA_A_LNPN,
.lxnpn = MACSEC_RXSA_A_LXNPN,
.ka = MACSEC_RXSA_A_KA,
.ssci = MACSEC_RXSA_A_SSCI,
.salt = MACSEC_RXSA_A_SALT,
.ipis = MACSEC_RXSA_A_IPIS,
.ipnvs = MACSEC_RXSA_A_IPNVS,
.ipos = MACSEC_RXSA_A_IPOS,
};
static const struct nxp_c45_sa_regs rx_sa_b_regs = {
.cs = MACSEC_RXSA_B_CS,
.npn = MACSEC_RXSA_B_NPN,
.xnpn = MACSEC_RXSA_B_XNPN,
.lnpn = MACSEC_RXSA_B_LNPN,
.lxnpn = MACSEC_RXSA_B_LXNPN,
.ka = MACSEC_RXSA_B_KA,
.ssci = MACSEC_RXSA_B_SSCI,
.salt = MACSEC_RXSA_B_SALT,
.ipis = MACSEC_RXSA_B_IPIS,
.ipnvs = MACSEC_RXSA_B_IPNVS,
.ipos = MACSEC_RXSA_B_IPOS,
};
static const struct nxp_c45_sa_regs tx_sa_a_regs = {
.cs = MACSEC_TXSA_A_CS,
.npn = MACSEC_TXSA_A_NPN,
.xnpn = MACSEC_TXSA_A_XNPN,
.ka = MACSEC_TXSA_A_KA,
.ssci = MACSEC_TXSA_A_SSCI,
.salt = MACSEC_TXSA_A_SALT,
.opps = MACSEC_TXSA_A_OPPS,
.opes = MACSEC_TXSA_A_OPES,
};
static const struct nxp_c45_sa_regs tx_sa_b_regs = {
.cs = MACSEC_TXSA_B_CS,
.npn = MACSEC_TXSA_B_NPN,
.xnpn = MACSEC_TXSA_B_XNPN,
.ka = MACSEC_TXSA_B_KA,
.ssci = MACSEC_TXSA_B_SSCI,
.salt = MACSEC_TXSA_B_SALT,
.opps = MACSEC_TXSA_B_OPPS,
.opes = MACSEC_TXSA_B_OPES,
};
Annotation
- Immediate include surface: `linux/delay.h`, `linux/ethtool_netlink.h`, `linux/kernel.h`, `linux/mii.h`, `linux/module.h`, `linux/phy.h`, `linux/processor.h`, `net/dst_metadata.h`.
- Detected declarations: `struct nxp_c45_sa`, `struct nxp_c45_secy`, `struct nxp_c45_macsec`, `struct nxp_c45_sa_regs`, `struct tja11xx_tlv_header`, `enum nxp_c45_sa_type`, `function nxp_c45_macsec_write`, `function nxp_c45_macsec_read`, `function nxp_c45_macsec_read32_64`, `function nxp_c45_macsec_read64`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.