drivers/net/phy/phy-core.c
Source file repositories/reference/linux-study-clean/drivers/net/phy/phy-core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/phy/phy-core.c- Extension
.c- Size
- 25008 bytes
- Lines
- 904
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/export.hlinux/phy.hlinux/phy_port.hlinux/of.hphylib.hphylib-internal.hphy-caps.h
Detected Declarations
function phy_fix_phy_mode_for_mac_delaysfunction phy_interface_num_portsfunction __set_phy_supportedfunction phy_set_max_speedfunction of_set_phy_supportedfunction of_set_phy_eee_brokenfunction of_set_phy_timing_rolefunction phy_resolve_aneg_pausefunction phy_resolve_aneg_linkmodefunction phy_check_downshiftfunction phy_resolve_min_speedfunction phy_speed_down_corefunction mmd_phy_indirectfunction mmd_phy_readfunction mmd_phy_writefunction __phy_read_mmdfunction phy_read_mmdfunction __phy_write_mmdfunction phy_write_mmdfunction phy_modify_changedfunction __phy_modifyfunction phy_modifyfunction __phy_modify_mmd_changedfunction phy_modify_mmd_changedfunction __phy_modify_mmdfunction phy_modify_mmdfunction __phy_read_pagefunction __phy_write_pagefunction phy_save_pagefunction phy_select_pagefunction phy_restore_pagefunction phy_read_pagedfunction phy_write_pagedfunction phy_modify_paged_changedfunction phy_modify_pagedexport phy_speed_to_strexport phy_duplex_to_strexport phy_rate_matching_to_strexport phy_fix_phy_mode_for_mac_delaysexport phy_interface_num_portsexport phy_set_max_speedexport phy_resolve_aneg_pauseexport phy_resolve_aneg_linkmodeexport mmd_phy_readexport mmd_phy_writeexport __phy_read_mmdexport phy_read_mmdexport __phy_write_mmd
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Core PHY library, taken from phy.c
*/
#include <linux/export.h>
#include <linux/phy.h>
#include <linux/phy_port.h>
#include <linux/of.h>
#include "phylib.h"
#include "phylib-internal.h"
#include "phy-caps.h"
/**
* phy_speed_to_str - Return a string representing the PHY link speed
*
* @speed: Speed of the link
*/
const char *phy_speed_to_str(int speed)
{
BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 125,
"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
"If a speed or mode has been added please update phy_speed_to_str "
"and the PHY settings array.\n");
switch (speed) {
case SPEED_10:
return "10Mbps";
case SPEED_100:
return "100Mbps";
case SPEED_1000:
return "1Gbps";
case SPEED_2500:
return "2.5Gbps";
case SPEED_5000:
return "5Gbps";
case SPEED_10000:
return "10Gbps";
case SPEED_14000:
return "14Gbps";
case SPEED_20000:
return "20Gbps";
case SPEED_25000:
return "25Gbps";
case SPEED_40000:
return "40Gbps";
case SPEED_50000:
return "50Gbps";
case SPEED_56000:
return "56Gbps";
case SPEED_80000:
return "80Gbps";
case SPEED_100000:
return "100Gbps";
case SPEED_200000:
return "200Gbps";
case SPEED_400000:
return "400Gbps";
case SPEED_800000:
return "800Gbps";
case SPEED_1600000:
return "1600Gbps";
case SPEED_UNKNOWN:
return "Unknown";
default:
return "Unsupported (update phy-core.c)";
}
}
EXPORT_SYMBOL_GPL(phy_speed_to_str);
/**
* phy_duplex_to_str - Return string describing the duplex
*
* @duplex: Duplex setting to describe
*/
const char *phy_duplex_to_str(unsigned int duplex)
{
if (duplex == DUPLEX_HALF)
return "Half";
if (duplex == DUPLEX_FULL)
return "Full";
if (duplex == DUPLEX_UNKNOWN)
return "Unknown";
return "Unsupported (update phy-core.c)";
}
EXPORT_SYMBOL_GPL(phy_duplex_to_str);
/**
* phy_rate_matching_to_str - Return a string describing the rate matching
*
Annotation
- Immediate include surface: `linux/export.h`, `linux/phy.h`, `linux/phy_port.h`, `linux/of.h`, `phylib.h`, `phylib-internal.h`, `phy-caps.h`.
- Detected declarations: `function phy_fix_phy_mode_for_mac_delays`, `function phy_interface_num_ports`, `function __set_phy_supported`, `function phy_set_max_speed`, `function of_set_phy_supported`, `function of_set_phy_eee_broken`, `function of_set_phy_timing_role`, `function phy_resolve_aneg_pause`, `function phy_resolve_aneg_linkmode`, `function phy_check_downshift`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.