drivers/net/phy/qcom/qcom.h
Source file repositories/reference/linux-study-clean/drivers/net/phy/qcom/qcom.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/phy/qcom/qcom.h- Extension
.h- Size
- 11983 bytes
- Lines
- 272
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct at803x_hw_statstruct at803x_ss_maskstruct qcom_phy_hw_statsenum stat_access_type
Annotated Snippet
struct at803x_hw_stat {
const char *string;
u8 reg;
u32 mask;
enum stat_access_type access_type;
};
struct at803x_ss_mask {
u16 speed_mask;
u8 speed_shift;
};
struct qcom_phy_hw_stats {
u64 rx_pkts;
u64 rx_err_pkts;
u64 tx_pkts;
u64 tx_err_pkts;
};
int at803x_debug_reg_read(struct phy_device *phydev, u16 reg);
int at803x_debug_reg_mask(struct phy_device *phydev, u16 reg,
u16 clear, u16 set);
int at803x_debug_reg_write(struct phy_device *phydev, u16 reg, u16 data);
int at803x_set_wol(struct phy_device *phydev,
struct ethtool_wolinfo *wol);
int at8031_set_wol(struct phy_device *phydev,
struct ethtool_wolinfo *wol);
void at803x_get_wol(struct phy_device *phydev,
struct ethtool_wolinfo *wol);
int at803x_ack_interrupt(struct phy_device *phydev);
int at803x_config_intr(struct phy_device *phydev);
irqreturn_t at803x_handle_interrupt(struct phy_device *phydev);
int at803x_read_specific_status(struct phy_device *phydev,
struct at803x_ss_mask ss_mask);
int at803x_config_mdix(struct phy_device *phydev, u8 ctrl);
int at803x_prepare_config_aneg(struct phy_device *phydev);
int at803x_read_status(struct phy_device *phydev);
int at803x_get_tunable(struct phy_device *phydev,
struct ethtool_tunable *tuna, void *data);
int at803x_set_tunable(struct phy_device *phydev,
struct ethtool_tunable *tuna, const void *data);
int at803x_cdt_fault_length(int dt);
int at803x_cdt_start(struct phy_device *phydev, u32 cdt_start);
int at803x_cdt_wait_for_completion(struct phy_device *phydev,
u32 cdt_en);
int qca808x_cable_test_get_status(struct phy_device *phydev, bool *finished);
int qca808x_led_reg_hw_control_enable(struct phy_device *phydev, u16 reg);
bool qca808x_led_reg_hw_control_status(struct phy_device *phydev, u16 reg);
int qca808x_led_reg_brightness_set(struct phy_device *phydev,
u16 reg, enum led_brightness value);
int qca808x_led_reg_blink_set(struct phy_device *phydev, u16 reg,
unsigned long *delay_on,
unsigned long *delay_off);
int qcom_phy_counter_config(struct phy_device *phydev);
int qcom_phy_update_stats(struct phy_device *phydev,
struct qcom_phy_hw_stats *hw_stats);
void qcom_phy_get_stats(struct ethtool_phy_stats *stats,
struct qcom_phy_hw_stats hw_stats);
Annotation
- Detected declarations: `struct at803x_hw_stat`, `struct at803x_ss_mask`, `struct qcom_phy_hw_stats`, `enum stat_access_type`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.