drivers/net/phy/vitesse.c

Source file repositories/reference/linux-study-clean/drivers/net/phy/vitesse.c

File Facts

System
Linux kernel
Corpus path
drivers/net/phy/vitesse.c
Extension
.c
Size
19964 bytes
Lines
733
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/*
 * Driver for Vitesse PHYs
 *
 * Author: Kriston Carson
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
#include <linux/bitfield.h>

/* Vitesse Extended Page Magic Register(s) */
#define MII_VSC73XX_EXT_PAGE_1E		0x01
#define MII_VSC82X4_EXT_PAGE_16E	0x10
#define MII_VSC82X4_EXT_PAGE_17E	0x11
#define MII_VSC82X4_EXT_PAGE_18E	0x12

/* Vitesse Extended Control Register 1 */
#define MII_VSC8244_EXT_CON1           0x17
#define MII_VSC8244_EXTCON1_INIT       0x0000
#define MII_VSC8244_EXTCON1_TX_SKEW_MASK	0x0c00
#define MII_VSC8244_EXTCON1_RX_SKEW_MASK	0x0300
#define MII_VSC8244_EXTCON1_TX_SKEW	0x0800
#define MII_VSC8244_EXTCON1_RX_SKEW	0x0200

/* Vitesse Interrupt Mask Register */
#define MII_VSC8244_IMASK		0x19
#define MII_VSC8244_IMASK_IEN		0x8000
#define MII_VSC8244_IMASK_SPEED		0x4000
#define MII_VSC8244_IMASK_LINK		0x2000
#define MII_VSC8244_IMASK_DUPLEX	0x1000
#define MII_VSC8244_IMASK_MASK		0xf000

#define MII_VSC8221_IMASK_MASK		0xa000

/* Vitesse Interrupt Status Register */
#define MII_VSC8244_ISTAT		0x1a
#define MII_VSC8244_ISTAT_STATUS	0x8000
#define MII_VSC8244_ISTAT_SPEED		0x4000
#define MII_VSC8244_ISTAT_LINK		0x2000
#define MII_VSC8244_ISTAT_DUPLEX	0x1000
#define MII_VSC8244_ISTAT_MASK		(MII_VSC8244_ISTAT_SPEED | \
					 MII_VSC8244_ISTAT_LINK | \
					 MII_VSC8244_ISTAT_DUPLEX)

#define MII_VSC8221_ISTAT_MASK		MII_VSC8244_ISTAT_LINK

/* Vitesse Auxiliary Control/Status Register */
#define MII_VSC8244_AUX_CONSTAT		0x1c
#define MII_VSC8244_AUXCONSTAT_INIT	0x0000
#define MII_VSC8244_AUXCONSTAT_DUPLEX	0x0020
#define MII_VSC8244_AUXCONSTAT_SPEED	0x0018
#define MII_VSC8244_AUXCONSTAT_GBIT	0x0010
#define MII_VSC8244_AUXCONSTAT_100	0x0008

#define MII_VSC8221_AUXCONSTAT_INIT	0x0004 /* need to set this bit? */
#define MII_VSC8221_AUXCONSTAT_RESERVED	0x0004

/* Vitesse Extended Page Access Register */
#define MII_VSC82X4_EXT_PAGE_ACCESS	0x1f

/* Vitesse VSC8662 extended control register */
#define VSC8662_EXT_CON1		0x17
#define VSC8662_EXT_CON_MAC_AN		BIT(13)

#define VSC8662_MAC_AN			0x1b
#define VSC8662_MAC_AN_BYPASS		BIT(13)

/* Vitesse VSC73XX Extended Control Register */
#define MII_VSC73XX_PHY_CTRL_EXT3		0x14

#define MII_VSC73XX_PHY_CTRL_EXT3_DOWNSHIFT_EN	BIT(4)
#define MII_VSC73XX_PHY_CTRL_EXT3_DOWNSHIFT_CNT	GENMASK(3, 2)
#define MII_VSC73XX_PHY_CTRL_EXT3_DOWNSHIFT_STA	BIT(1)
#define MII_VSC73XX_DOWNSHIFT_MAX		5
#define MII_VSC73XX_DOWNSHIFT_INVAL		1

/* VSC73XX PHY_BYPASS_CTRL register*/
#define MII_VSC73XX_PHY_BYPASS_CTRL		MII_DCOUNTER
#define MII_VSC73XX_PBC_TX_DIS			BIT(15)
#define MII_VSC73XX_PBC_FOR_SPD_AUTO_MDIX_DIS	BIT(7)
#define MII_VSC73XX_PBC_PAIR_SWAP_DIS		BIT(5)
#define MII_VSC73XX_PBC_POL_INV_DIS		BIT(4)
#define MII_VSC73XX_PBC_PARALLEL_DET_DIS	BIT(3)
#define MII_VSC73XX_PBC_AUTO_NP_EXCHANGE_DIS	BIT(1)

/* VSC73XX PHY_AUX_CTRL_STAT register */

Annotation

Implementation Notes