drivers/net/pse-pd/tps23881.c
Source file repositories/reference/linux-study-clean/drivers/net/pse-pd/tps23881.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/pse-pd/tps23881.c- Extension
.c- Size
- 38734 bytes
- Lines
- 1563
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/delay.hlinux/firmware.hlinux/gpio/consumer.hlinux/i2c.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/pse-pd/pse.h
Detected Declarations
struct tps23881_port_descstruct tps23881_privstruct tps23881_port_matrixstruct tps23881_infostruct tps23881_fw_confenum tps23881_modelfunction tps23881_calc_valfunction tps23881_set_valfunction tps23881_pi_set_pw_pol_limitfunction tps23881_pi_enable_manual_polfunction tps23881_pi_enablefunction tps23881_pi_disablefunction tps23881_pi_get_admin_statefunction tps23881_pi_get_pw_statusfunction tps23881_pi_get_voltagefunction tps23881_pi_get_chan_currentfunction tps23881_pi_get_pw_classfunction tps23881_pi_get_actual_pwfunction tps23881_pi_get_pw_limit_chanfunction tps23881_pi_get_pw_limitfunction tps23881_pi_set_pw_limitfunction tps23881_pi_get_pw_limit_rangesfunction tps23881_get_of_channelsfunction for_each_child_of_nodefunction tps23881_match_channelfunction tps23881_is_chan_freefunction tps23881_match_port_matrixfunction tps23881_get_unused_chanfunction groupfunction tps23881_write_port_matrixfunction tps23881_set_ports_conffunction tps23881_set_ports_matrixfunction tps23881_setup_pi_matrixfunction tps23881_pi_get_pw_reqfunction tps23881_flash_sram_fw_partfunction tps23881_flash_sram_fwfunction tps23881_irq_export_chans_helperfunction tps23881_set_notifs_helperfunction tps23881_irq_event_over_tempfunction tps23881_irq_event_over_currentfunction tps23881_irq_event_disconnectionfunction tps23881_irq_event_detectionfunction tps23881_irq_event_classificationfunction tps23881_irq_event_handlerfunction tps23881_irq_handlerfunction tps23881_setup_irqfunction tps23881_i2c_probe
Annotated Snippet
struct tps23881_port_desc {
u8 chan[2];
bool is_4p;
int pw_pol;
bool exist;
};
struct tps23881_priv {
struct i2c_client *client;
struct pse_controller_dev pcdev;
struct device_node *np;
struct tps23881_port_desc port[TPS23881_MAX_CHANS];
};
static struct tps23881_priv *to_tps23881_priv(struct pse_controller_dev *pcdev)
{
return container_of(pcdev, struct tps23881_priv, pcdev);
}
/*
* Helper to extract a value from a u16 register value, which is made of two
* u8 registers. The function calculates the bit offset based on the channel
* and extracts the relevant bits using a provided field mask.
*
* @param reg_val: The u16 register value (composed of two u8 registers).
* @param chan: The channel number (0-7).
* @param field_offset: The base bit offset to apply (e.g., 0 or 4).
* @param field_mask: The mask to apply to extract the required bits.
* @return: The extracted value for the specific channel.
*/
static u16 tps23881_calc_val(u16 reg_val, u8 chan, u8 field_offset,
u16 field_mask)
{
if (chan >= 4)
reg_val >>= 8;
return (reg_val >> field_offset) & field_mask;
}
/*
* Helper to combine individual channel values into a u16 register value.
* The function sets the value for a specific channel in the appropriate
* position.
*
* @param reg_val: The current u16 register value.
* @param chan: The channel number (0-7).
* @param field_offset: The base bit offset to apply (e.g., 0 or 4).
* @param field_mask: The mask to apply for the field (e.g., 0x0F).
* @param field_val: The value to set for the specific channel (masked by
* field_mask).
* @return: The updated u16 register value with the channel value set.
*/
static u16 tps23881_set_val(u16 reg_val, u8 chan, u8 field_offset,
u16 field_mask, u16 field_val)
{
field_val &= field_mask;
if (chan < 4) {
reg_val &= ~(field_mask << field_offset);
reg_val |= (field_val << field_offset);
} else {
reg_val &= ~(field_mask << (field_offset + 8));
reg_val |= (field_val << (field_offset + 8));
}
return reg_val;
}
static int
tps23881_pi_set_pw_pol_limit(struct tps23881_priv *priv, int id, u8 pw_pol,
bool is_4p)
{
struct i2c_client *client = priv->client;
int ret, reg;
u16 val;
u8 chan;
chan = priv->port[id].chan[0];
if (!is_4p) {
reg = TPS23881_REG_2PAIR_POL1 + (chan % 4);
} else {
/* One chan is enough to configure the 4p PI power limit */
if ((chan % 4) < 2)
reg = TPS23881_REG_4PAIR_POL1;
else
reg = TPS23881_REG_4PAIR_POL1 + 1;
}
ret = i2c_smbus_read_word_data(client, reg);
if (ret < 0)
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/delay.h`, `linux/firmware.h`, `linux/gpio/consumer.h`, `linux/i2c.h`, `linux/module.h`, `linux/of.h`, `linux/platform_device.h`.
- Detected declarations: `struct tps23881_port_desc`, `struct tps23881_priv`, `struct tps23881_port_matrix`, `struct tps23881_info`, `struct tps23881_fw_conf`, `enum tps23881_model`, `function tps23881_calc_val`, `function tps23881_set_val`, `function tps23881_pi_set_pw_pol_limit`, `function tps23881_pi_enable_manual_pol`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.