drivers/net/wan/ixp4xx_hss.c
Source file repositories/reference/linux-study-clean/drivers/net/wan/ixp4xx_hss.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wan/ixp4xx_hss.c- Extension
.c- Size
- 41445 bytes
- Lines
- 1545
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/bitops.hlinux/cdev.hlinux/dma-mapping.hlinux/dmapool.hlinux/fs.hlinux/hdlc.hlinux/io.hlinux/kernel.hlinux/mfd/syscon.hlinux/platform_device.hlinux/poll.hlinux/regmap.hlinux/slab.hlinux/gpio/consumer.hlinux/of.hlinux/soc/ixp4xx/npe.hlinux/soc/ixp4xx/qmgr.hlinux/soc/ixp4xx/cpu.h
Detected Declarations
struct portstruct msgstruct descfunction memcpy_swab32function hss_npe_sendfunction hss_config_set_lutfunction hss_configfunction hss_set_hdlc_cfgfunction hss_get_statusfunction hss_start_hdlcfunction hss_stop_hdlcfunction hss_load_firmwarefunction packetizedfunction debug_descfunction queue_get_descfunction queue_put_descfunction dma_unmap_txfunction hss_hdlc_set_carrierfunction hss_hdlc_rx_irqfunction hss_hdlc_pollfunction hss_hdlc_txdone_irqfunction hss_hdlc_xmitfunction request_hdlc_queuesfunction release_hdlc_queuesfunction init_hdlc_queuesfunction destroy_hdlc_queuesfunction hss_hdlc_dcd_irqfunction hss_hdlc_openfunction hss_hdlc_closefunction hss_hdlc_attachfunction check_clockfunction find_best_clockfunction hss_hdlc_set_clockfunction hss_hdlc_ioctlfunction ixp4xx_hss_probefunction ixp4xx_hss_remove
Annotated Snippet
static const struct net_device_ops hss_hdlc_ops = {
.ndo_open = hss_hdlc_open,
.ndo_stop = hss_hdlc_close,
.ndo_start_xmit = hdlc_start_xmit,
.ndo_siocwandev = hss_hdlc_ioctl,
};
static int ixp4xx_hss_probe(struct platform_device *pdev)
{
struct of_phandle_args queue_spec;
struct of_phandle_args npe_spec;
struct device *dev = &pdev->dev;
struct net_device *ndev;
struct device_node *np;
struct regmap *rmap;
struct port *port;
hdlc_device *hdlc;
int err;
u32 val;
/*
* Go into the syscon and check if we have the HSS and HDLC
* features available, else this will not work.
*/
rmap = syscon_regmap_lookup_by_compatible("syscon");
if (IS_ERR(rmap))
return dev_err_probe(dev, PTR_ERR(rmap),
"failed to look up syscon\n");
val = cpu_ixp4xx_features(rmap);
if ((val & (IXP4XX_FEATURE_HDLC | IXP4XX_FEATURE_HSS)) !=
(IXP4XX_FEATURE_HDLC | IXP4XX_FEATURE_HSS)) {
dev_err(dev, "HDLC and HSS feature unavailable in platform\n");
return -ENODEV;
}
np = dev->of_node;
port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
if (!port)
return -ENOMEM;
err = of_parse_phandle_with_fixed_args(np, "intel,npe-handle", 1, 0,
&npe_spec);
if (err)
return dev_err_probe(dev, err, "no NPE engine specified\n");
/* NPE ID 0x00, 0x10, 0x20... */
port->npe = npe_request(npe_spec.args[0] << 4);
if (!port->npe) {
dev_err(dev, "unable to obtain NPE instance\n");
return -ENODEV;
}
/* Get the TX ready queue as resource from queue manager */
err = of_parse_phandle_with_fixed_args(np, "intek,queue-chl-txready", 1, 0,
&queue_spec);
if (err)
return dev_err_probe(dev, err, "no txready queue phandle\n");
port->txreadyq = queue_spec.args[0];
/* Get the RX trig queue as resource from queue manager */
err = of_parse_phandle_with_fixed_args(np, "intek,queue-chl-rxtrig", 1, 0,
&queue_spec);
if (err)
return dev_err_probe(dev, err, "no rxtrig queue phandle\n");
port->rxtrigq = queue_spec.args[0];
/* Get the RX queue as resource from queue manager */
err = of_parse_phandle_with_fixed_args(np, "intek,queue-pkt-rx", 1, 0,
&queue_spec);
if (err)
return dev_err_probe(dev, err, "no RX queue phandle\n");
port->rxq = queue_spec.args[0];
/* Get the TX queue as resource from queue manager */
err = of_parse_phandle_with_fixed_args(np, "intek,queue-pkt-tx", 1, 0,
&queue_spec);
if (err)
return dev_err_probe(dev, err, "no RX queue phandle\n");
port->txq = queue_spec.args[0];
/* Get the RX free queue as resource from queue manager */
err = of_parse_phandle_with_fixed_args(np, "intek,queue-pkt-rxfree", 1, 0,
&queue_spec);
if (err)
return dev_err_probe(dev, err, "no RX free queue phandle\n");
port->rxfreeq = queue_spec.args[0];
/* Get the TX done queue as resource from queue manager */
err = of_parse_phandle_with_fixed_args(np, "intek,queue-pkt-txdone", 1, 0,
&queue_spec);
if (err)
return dev_err_probe(dev, err, "no TX done queue phandle\n");
port->txdoneq = queue_spec.args[0];
Annotation
- Immediate include surface: `linux/module.h`, `linux/bitops.h`, `linux/cdev.h`, `linux/dma-mapping.h`, `linux/dmapool.h`, `linux/fs.h`, `linux/hdlc.h`, `linux/io.h`.
- Detected declarations: `struct port`, `struct msg`, `struct desc`, `function memcpy_swab32`, `function hss_npe_send`, `function hss_config_set_lut`, `function hss_config`, `function hss_set_hdlc_cfg`, `function hss_get_status`, `function hss_start_hdlc`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.