drivers/net/wan/wanxl.c
Source file repositories/reference/linux-study-clean/drivers/net/wan/wanxl.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wan/wanxl.c- Extension
.c- Size
- 20647 bytes
- Lines
- 842
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/slab.hlinux/sched.hlinux/types.hlinux/fcntl.hlinux/string.hlinux/errno.hlinux/init.hlinux/interrupt.hlinux/ioport.hlinux/netdevice.hlinux/hdlc.hlinux/pci.hlinux/dma-mapping.hlinux/delay.hasm/io.hwanxl.hwanxlfw.inc
Detected Declarations
struct portstruct card_statusstruct cardfunction pci_map_single_debugfunction wanxl_cable_intrfunction wanxl_tx_intrfunction wanxl_rx_intrfunction wanxl_intrfunction wanxl_xmitfunction wanxl_attachfunction wanxl_ioctlfunction wanxl_openfunction wanxl_closefunction wanxl_puts_commandfunction wanxl_resetfunction wanxl_pci_remove_onefunction wanxl_pci_init_onefunction pci_alloc_consistentfunction dma_set_maskfunction wanxl_init_modulefunction wanxl_cleanup_modulemodule init wanxl_init_module
Annotated Snippet
static const struct net_device_ops wanxl_ops = {
.ndo_open = wanxl_open,
.ndo_stop = wanxl_close,
.ndo_start_xmit = hdlc_start_xmit,
.ndo_siocwandev = wanxl_ioctl,
.ndo_get_stats = wanxl_get_stats,
};
static int wanxl_pci_init_one(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct card *card;
u32 ramsize, stat;
unsigned long timeout;
u32 plx_phy; /* PLX PCI base address */
u32 mem_phy; /* memory PCI base addr */
u8 __iomem *mem; /* memory virtual base addr */
int i, ports;
#ifndef MODULE
pr_info_once("%s\n", version);
#endif
i = pci_enable_device(pdev);
if (i)
return i;
/* QUICC can only access first 256 MB of host RAM directly,
* but PLX9060 DMA does 32-bits for actual packet data transfers
*/
/* FIXME when PCI/DMA subsystems are fixed.
* We set both dma_mask and consistent_dma_mask to 28 bits
* and pray pci_alloc_consistent() will use this info. It should
* work on most platforms
*/
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(28)) ||
dma_set_mask(&pdev->dev, DMA_BIT_MASK(28))) {
pr_err("No usable DMA configuration\n");
pci_disable_device(pdev);
return -EIO;
}
i = pci_request_regions(pdev, "wanXL");
if (i) {
pci_disable_device(pdev);
return i;
}
switch (pdev->device) {
case PCI_DEVICE_ID_SBE_WANXL100:
ports = 1;
break;
case PCI_DEVICE_ID_SBE_WANXL200:
ports = 2;
break;
default:
ports = 4;
}
card = kzalloc_flex(*card, ports, ports);
if (!card) {
pci_release_regions(pdev);
pci_disable_device(pdev);
return -ENOBUFS;
}
pci_set_drvdata(pdev, card);
card->pdev = pdev;
card->status = dma_alloc_coherent(&pdev->dev,
sizeof(struct card_status),
&card->status_address, GFP_KERNEL);
if (!card->status) {
wanxl_pci_remove_one(pdev);
return -ENOBUFS;
}
#ifdef DEBUG_PCI
printk(KERN_DEBUG "wanXL %s: pci_alloc_consistent() returned memory"
" at 0x%LX\n", pci_name(pdev),
(unsigned long long)card->status_address);
#endif
/* FIXME when PCI/DMA subsystems are fixed.
* We set both dma_mask and consistent_dma_mask back to 32 bits
* to indicate the card can do 32-bit DMA addressing
*/
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)) ||
dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/slab.h`, `linux/sched.h`, `linux/types.h`, `linux/fcntl.h`, `linux/string.h`, `linux/errno.h`.
- Detected declarations: `struct port`, `struct card_status`, `struct card`, `function pci_map_single_debug`, `function wanxl_cable_intr`, `function wanxl_tx_intr`, `function wanxl_rx_intr`, `function wanxl_intr`, `function wanxl_xmit`, `function wanxl_attach`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.