drivers/net/wireless/ath/ath10k/htt_rx.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath10k/htt_rx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath10k/htt_rx.c- Extension
.c- Size
- 127000 bytes
- Lines
- 4473
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/export.hcore.hhtc.hhtt.htxrx.hdebug.htrace.hmac.hlinux/log2.hlinux/bitfield.h
Detected Declarations
struct amsdu_subframe_hdrfunction ath10k_htt_rx_find_skb_paddrfunction ath10k_htt_rx_ring_freefunction ath10k_htt_get_rx_ring_size_32function ath10k_htt_get_rx_ring_size_64function ath10k_htt_config_paddrs_ring_32function ath10k_htt_config_paddrs_ring_64function ath10k_htt_set_paddrs_ring_32function ath10k_htt_set_paddrs_ring_64function ath10k_htt_reset_paddrs_ring_32function ath10k_htt_reset_paddrs_ring_64function __ath10k_htt_rx_ring_fill_nfunction ath10k_htt_rx_ring_fill_nfunction ath10k_htt_rx_msdu_buff_replenishfunction ath10k_htt_rx_ring_refill_retryfunction ath10k_htt_rx_ring_refillfunction ath10k_htt_rx_freefunction ath10k_htt_rx_amsdu_popfunction ath10k_htt_append_frag_listfunction ath10k_htt_rx_handle_amsdu_mon_32function ath10k_htt_rx_handle_amsdu_mon_64function ath10k_htt_rx_pop_paddr32_listfunction ath10k_htt_rx_pop_paddr64_listfunction ath10k_htt_rx_allocfunction ath10k_htt_rx_crypto_param_lenfunction ath10k_htt_rx_crypto_mic_lenfunction ath10k_htt_rx_crypto_icv_lenfunction ath10k_bw_to_mac80211_bwfunction ath10k_htt_rx_h_ratesfunction ath10k_htt_rx_h_peer_channelfunction ath10k_htt_rx_h_vdev_channelfunction list_for_each_entryfunction ath10k_htt_rx_h_any_chan_iterfunction ath10k_htt_rx_h_any_channelfunction ath10k_htt_rx_h_channelfunction ath10k_htt_rx_h_signalfunction ath10k_htt_rx_h_mactimefunction ath10k_htt_rx_h_ppdufunction ath10k_htt_rx_h_queue_msdufunction ath10k_process_rxfunction ath10k_htt_rx_nwifi_hdrlenfunction ath10k_htt_rx_h_undecap_rawfunction ath10k_htt_rx_h_undecap_nwififunction ath10k_htt_rx_h_undecap_ethfunction ath10k_htt_rx_h_undecap_snapfunction ath10k_htt_rx_h_undecapfunction ath10k_htt_rx_get_csum_statefunction ath10k_htt_rx_h_csum_offload
Annotated Snippet
struct amsdu_subframe_hdr {
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
__be16 len;
} __packed;
#define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
static inline u8 ath10k_bw_to_mac80211_bw(u8 bw)
{
u8 ret = 0;
switch (bw) {
case 0:
ret = RATE_INFO_BW_20;
break;
case 1:
ret = RATE_INFO_BW_40;
break;
case 2:
ret = RATE_INFO_BW_80;
break;
case 3:
ret = RATE_INFO_BW_160;
break;
}
return ret;
}
static void ath10k_htt_rx_h_rates(struct ath10k *ar,
struct ieee80211_rx_status *status,
struct htt_rx_desc *rxd)
{
struct ath10k_hw_params *hw = &ar->hw_params;
struct rx_attention *rxd_attention;
struct rx_mpdu_start *rxd_mpdu_start;
struct rx_mpdu_end *rxd_mpdu_end;
struct rx_msdu_start_common *rxd_msdu_start_common;
struct rx_msdu_end_common *rxd_msdu_end_common;
struct rx_ppdu_start *rxd_ppdu_start;
struct ieee80211_supported_band *sband;
u8 cck, rate, bw, sgi, mcs, nss;
u8 *rxd_msdu_payload;
u8 preamble = 0;
u8 group_id;
u32 info1, info2, info3;
u32 stbc, nsts_su;
rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd);
rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd);
rxd_mpdu_end = ath10k_htt_rx_desc_get_mpdu_end(hw, rxd);
rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd);
rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd);
rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd);
rxd_msdu_payload = ath10k_htt_rx_desc_get_msdu_payload(hw, rxd);
info1 = __le32_to_cpu(rxd_ppdu_start->info1);
info2 = __le32_to_cpu(rxd_ppdu_start->info2);
info3 = __le32_to_cpu(rxd_ppdu_start->info3);
preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
switch (preamble) {
case HTT_RX_LEGACY:
/* To get legacy rate index band is required. Since band can't
* be undefined check if freq is non-zero.
*/
if (!status->freq)
return;
cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
rate &= ~RX_PPDU_START_RATE_FLAG;
sband = &ar->mac.sbands[status->band];
status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
break;
case HTT_RX_HT:
case HTT_RX_HT_WITH_TXBF:
/* HT-SIG - Table 20-11 in info2 and info3 */
mcs = info2 & 0x1F;
nss = mcs >> 3;
bw = (info2 >> 7) & 1;
sgi = (info3 >> 7) & 1;
status->rate_idx = mcs;
status->encoding = RX_ENC_HT;
if (sgi)
status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
Annotation
- Immediate include surface: `linux/export.h`, `core.h`, `htc.h`, `htt.h`, `txrx.h`, `debug.h`, `trace.h`, `mac.h`.
- Detected declarations: `struct amsdu_subframe_hdr`, `function ath10k_htt_rx_find_skb_paddr`, `function ath10k_htt_rx_ring_free`, `function ath10k_htt_get_rx_ring_size_32`, `function ath10k_htt_get_rx_ring_size_64`, `function ath10k_htt_config_paddrs_ring_32`, `function ath10k_htt_config_paddrs_ring_64`, `function ath10k_htt_set_paddrs_ring_32`, `function ath10k_htt_set_paddrs_ring_64`, `function ath10k_htt_reset_paddrs_ring_32`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.