drivers/net/wireless/ath/ath10k/htt_tx.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath10k/htt_tx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath10k/htt_tx.c- Extension
.c- Size
- 50061 bytes
- Lines
- 1842
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/export.hlinux/etherdevice.hhtt.hmac.hhif.htxrx.hdebug.h
Detected Declarations
function Copyrightfunction __ath10k_htt_tx_txq_recalcfunction __ath10k_htt_tx_txq_syncfunction ath10k_htt_tx_txq_recalcfunction ath10k_htt_tx_txq_syncfunction ath10k_htt_tx_txq_updatefunction ath10k_htt_tx_dec_pendingfunction ath10k_htt_tx_inc_pendingfunction ath10k_htt_tx_mgmt_inc_pendingfunction ath10k_htt_tx_mgmt_dec_pendingfunction ath10k_htt_tx_alloc_msdu_idfunction ath10k_htt_tx_free_msdu_idfunction ath10k_htt_tx_free_cont_txbuf_32function ath10k_htt_tx_alloc_cont_txbuf_32function ath10k_htt_tx_free_cont_txbuf_64function ath10k_htt_tx_alloc_cont_txbuf_64function ath10k_htt_tx_free_cont_frag_desc_32function ath10k_htt_tx_alloc_cont_frag_desc_32function ath10k_htt_tx_free_cont_frag_desc_64function ath10k_htt_tx_alloc_cont_frag_desc_64function ath10k_htt_tx_free_txqfunction ath10k_htt_tx_alloc_txqfunction ath10k_htt_tx_free_txdone_fifofunction ath10k_htt_tx_alloc_txdone_fifofunction ath10k_htt_tx_alloc_buffunction ath10k_htt_tx_startfunction ath10k_htt_tx_clean_up_pendingfunction ath10k_htt_tx_destroyfunction ath10k_htt_flush_tx_queuefunction ath10k_htt_tx_stopfunction ath10k_htt_tx_freefunction ath10k_htt_op_ep_tx_creditsfunction ath10k_htt_htc_tx_completefunction ath10k_htt_hif_tx_completefunction ath10k_htt_h2t_ver_req_msgfunction ath10k_htt_h2t_stats_reqfunction ath10k_htt_send_frag_desc_bank_cfg_32function ath10k_htt_send_frag_desc_bank_cfg_64function ath10k_htt_fill_rx_desc_offset_32function ath10k_htt_fill_rx_desc_offset_64function ath10k_htt_send_rx_ring_cfg_32function ath10k_htt_send_rx_ring_cfg_64function ath10k_htt_send_rx_ring_cfg_hlfunction ath10k_htt_h2t_aggr_cfg_msg_32function ath10k_htt_h2t_aggr_cfg_msg_v2function ath10k_htt_tx_fetch_respfunction ath10k_htt_tx_get_vdev_idfunction ath10k_htt_tx_get_tid
Annotated Snippet
unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
ath10k_warn(ar, "refusing to update txq for peer_id %u tid %u due to out of bounds\n",
peer_id, tid);
return;
}
ar->htt.tx_q_state.vaddr->count[tid][peer_id] = count;
ar->htt.tx_q_state.vaddr->map[tid][idx] &= ~bit;
ar->htt.tx_q_state.vaddr->map[tid][idx] |= count ? bit : 0;
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx txq state update peer_id %u tid %u count %u\n",
peer_id, tid, count);
}
static void __ath10k_htt_tx_txq_sync(struct ath10k *ar)
{
u32 seq;
size_t size;
lockdep_assert_held(&ar->htt.tx_lock);
if (!ar->htt.tx_q_state.enabled)
return;
if (ar->htt.tx_q_state.mode != HTT_TX_MODE_SWITCH_PUSH_PULL)
return;
seq = le32_to_cpu(ar->htt.tx_q_state.vaddr->seq);
seq++;
ar->htt.tx_q_state.vaddr->seq = cpu_to_le32(seq);
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx txq state update commit seq %u\n",
seq);
size = sizeof(*ar->htt.tx_q_state.vaddr);
dma_sync_single_for_device(ar->dev,
ar->htt.tx_q_state.paddr,
size,
DMA_TO_DEVICE);
}
void ath10k_htt_tx_txq_recalc(struct ieee80211_hw *hw,
struct ieee80211_txq *txq)
{
struct ath10k *ar = hw->priv;
spin_lock_bh(&ar->htt.tx_lock);
__ath10k_htt_tx_txq_recalc(hw, txq);
spin_unlock_bh(&ar->htt.tx_lock);
}
void ath10k_htt_tx_txq_sync(struct ath10k *ar)
{
spin_lock_bh(&ar->htt.tx_lock);
__ath10k_htt_tx_txq_sync(ar);
spin_unlock_bh(&ar->htt.tx_lock);
}
void ath10k_htt_tx_txq_update(struct ieee80211_hw *hw,
struct ieee80211_txq *txq)
{
struct ath10k *ar = hw->priv;
spin_lock_bh(&ar->htt.tx_lock);
__ath10k_htt_tx_txq_recalc(hw, txq);
__ath10k_htt_tx_txq_sync(ar);
spin_unlock_bh(&ar->htt.tx_lock);
}
void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
{
lockdep_assert_held(&htt->tx_lock);
htt->num_pending_tx--;
if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
ath10k_mac_tx_unlock(htt->ar, ATH10K_TX_PAUSE_Q_FULL);
if (htt->num_pending_tx == 0)
wake_up(&htt->empty_tx_wq);
}
int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
{
lockdep_assert_held(&htt->tx_lock);
if (htt->num_pending_tx >= htt->max_num_pending_tx)
return -EBUSY;
htt->num_pending_tx++;
if (htt->num_pending_tx == htt->max_num_pending_tx)
Annotation
- Immediate include surface: `linux/export.h`, `linux/etherdevice.h`, `htt.h`, `mac.h`, `hif.h`, `txrx.h`, `debug.h`.
- Detected declarations: `function Copyright`, `function __ath10k_htt_tx_txq_recalc`, `function __ath10k_htt_tx_txq_sync`, `function ath10k_htt_tx_txq_recalc`, `function ath10k_htt_tx_txq_sync`, `function ath10k_htt_tx_txq_update`, `function ath10k_htt_tx_dec_pending`, `function ath10k_htt_tx_inc_pending`, `function ath10k_htt_tx_mgmt_inc_pending`, `function ath10k_htt_tx_mgmt_dec_pending`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.