drivers/net/wireless/ath/ath10k/swap.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath10k/swap.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath10k/swap.c- Extension
.c- Size
- 5366 bytes
- Lines
- 196
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
core.hbmi.hdebug.h
Detected Declarations
function Copyrightfunction ath10k_swap_code_seg_freefunction ath10k_swap_code_seg_allocfunction ath10k_swap_code_seg_configurefunction ath10k_swap_code_seg_releasefunction ath10k_swap_code_seg_init
Annotated Snippet
if (payload_len == 0) {
if (memcmp(swap_item->tail.magic_signature, swap_magic,
ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ)) {
ath10k_err(ar, "refusing an invalid swap file\n");
return -EINVAL;
}
seg_info->target_addr =
__le32_to_cpu(swap_item->tail.bmi_write_addr);
break;
}
memcpy(virt_addr, swap_item->tlv.data, payload_len);
virt_addr += payload_len;
length = payload_len + sizeof(struct ath10k_swap_code_seg_tlv);
size_left -= length;
fw_data += length;
total_payload_len += payload_len;
}
if (seg_info->target_addr == -1) {
ath10k_err(ar, "failed to parse invalid swap file\n");
return -EINVAL;
}
seg_info->seg_hw_info.swap_size = __cpu_to_le32(total_payload_len);
return 0;
}
static void
ath10k_swap_code_seg_free(struct ath10k *ar,
struct ath10k_swap_code_seg_info *seg_info)
{
u32 seg_size;
if (!seg_info)
return;
if (!seg_info->virt_address[0])
return;
seg_size = __le32_to_cpu(seg_info->seg_hw_info.size);
dma_free_coherent(ar->dev, seg_size, seg_info->virt_address[0],
seg_info->paddr[0]);
}
static struct ath10k_swap_code_seg_info *
ath10k_swap_code_seg_alloc(struct ath10k *ar, size_t swap_bin_len)
{
struct ath10k_swap_code_seg_info *seg_info;
void *virt_addr;
dma_addr_t paddr;
swap_bin_len = roundup(swap_bin_len, 2);
if (swap_bin_len > ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX) {
ath10k_err(ar, "refusing code swap bin because it is too big %zu > %d\n",
swap_bin_len, ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX);
return NULL;
}
seg_info = devm_kzalloc(ar->dev, sizeof(*seg_info), GFP_KERNEL);
if (!seg_info)
return NULL;
virt_addr = dma_alloc_coherent(ar->dev, swap_bin_len, &paddr,
GFP_KERNEL);
if (!virt_addr)
return NULL;
seg_info->seg_hw_info.bus_addr[0] = __cpu_to_le32(paddr);
seg_info->seg_hw_info.size = __cpu_to_le32(swap_bin_len);
seg_info->seg_hw_info.swap_size = __cpu_to_le32(swap_bin_len);
seg_info->seg_hw_info.num_segs =
__cpu_to_le32(ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED);
seg_info->seg_hw_info.size_log2 = __cpu_to_le32(ilog2(swap_bin_len));
seg_info->virt_address[0] = virt_addr;
seg_info->paddr[0] = paddr;
return seg_info;
}
int ath10k_swap_code_seg_configure(struct ath10k *ar,
const struct ath10k_fw_file *fw_file)
{
int ret;
struct ath10k_swap_code_seg_info *seg_info = NULL;
if (!fw_file->firmware_swap_code_seg_info)
return 0;
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot found firmware code swap binary\n");
Annotation
- Immediate include surface: `core.h`, `bmi.h`, `debug.h`.
- Detected declarations: `function Copyright`, `function ath10k_swap_code_seg_free`, `function ath10k_swap_code_seg_alloc`, `function ath10k_swap_code_seg_configure`, `function ath10k_swap_code_seg_release`, `function ath10k_swap_code_seg_init`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.