drivers/net/wireless/ath/ath11k/hal_rx.h

File Facts

System

Linux kernel

Corpus path

drivers/net/wireless/ath/ath11k/hal_rx.h

Extension

.h

Size

14722 bytes

Lines

521

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct hal_rx_wbm_rel_info
• struct hal_rx_mon_status_tlv_hdr
• struct hal_rx_user_status
• struct hal_sw_mon_ring_entries
• struct hal_rx_mon_ppdu_info
• struct hal_rx_ppdu_start
• struct hal_rx_ppdu_end_user_stats
• struct hal_rx_ppdu_end_user_stats_ext
• struct hal_rx_ht_sig_info
• struct hal_rx_lsig_b_info
• struct hal_rx_lsig_a_info
• struct hal_rx_vht_sig_a_info
• struct hal_rx_he_sig_a_su_info
• struct hal_rx_he_sig_a_mu_dl_info
• struct hal_rx_he_sig_b1_mu_info
• struct hal_rx_he_sig_b2_mu_info
• struct hal_rx_he_sig_b2_ofdma_info
• struct hal_rx_phyrx_chain_rssi
• struct hal_rx_phyrx_rssi_legacy_info
• struct hal_rx_mpdu_info_ipq8074
• struct hal_rx_mpdu_info_qcn9074
• struct hal_rx_mpdu_info_wcn6855
• struct hal_rx_mpdu_info
• struct hal_rx_ppdu_end_duration
• struct hal_rx_rxpcu_classification_overview
• struct hal_rx_msdu_desc_info
• struct hal_rx_msdu_list
• enum hal_rx_su_mu_coding
• enum hal_rx_gi
• enum hal_rx_bw
• enum hal_rx_preamble
• enum hal_rx_reception_type
• enum hal_rx_mon_status
• enum hal_rx_vht_sig_a_gi_setting

Annotated Snippet

struct hal_rx_wbm_rel_info {
	u32 cookie;
	enum hal_wbm_rel_src_module err_rel_src;
	enum hal_reo_dest_ring_push_reason push_reason;
	u32 err_code;
	bool first_msdu;
	bool last_msdu;
};

#define HAL_INVALID_PEERID 0xffff
#define VHT_SIG_SU_NSS_MASK 0x7

#define HAL_RX_MAX_MCS 12
#define HAL_RX_MAX_NSS 8

struct hal_rx_mon_status_tlv_hdr {
	u32 hdr;
	u8 value[];
};

enum hal_rx_su_mu_coding {
	HAL_RX_SU_MU_CODING_BCC,
	HAL_RX_SU_MU_CODING_LDPC,
	HAL_RX_SU_MU_CODING_MAX,
};

enum hal_rx_gi {
	HAL_RX_GI_0_8_US,
	HAL_RX_GI_0_4_US,
	HAL_RX_GI_1_6_US,
	HAL_RX_GI_3_2_US,
	HAL_RX_GI_MAX,
};

enum hal_rx_bw {
	HAL_RX_BW_20MHZ,
	HAL_RX_BW_40MHZ,
	HAL_RX_BW_80MHZ,
	HAL_RX_BW_160MHZ,
	HAL_RX_BW_MAX,
};

enum hal_rx_preamble {
	HAL_RX_PREAMBLE_11A,
	HAL_RX_PREAMBLE_11B,
	HAL_RX_PREAMBLE_11N,
	HAL_RX_PREAMBLE_11AC,
	HAL_RX_PREAMBLE_11AX,
	HAL_RX_PREAMBLE_MAX,
};

enum hal_rx_reception_type {
	HAL_RX_RECEPTION_TYPE_SU,
	HAL_RX_RECEPTION_TYPE_MU_MIMO,
	HAL_RX_RECEPTION_TYPE_MU_OFDMA,
	HAL_RX_RECEPTION_TYPE_MU_OFDMA_MIMO,
	HAL_RX_RECEPTION_TYPE_MAX,
};

#define HAL_RX_FCS_LEN                          4

enum hal_rx_mon_status {
	HAL_RX_MON_STATUS_PPDU_NOT_DONE,
	HAL_RX_MON_STATUS_PPDU_DONE,
	HAL_RX_MON_STATUS_BUF_DONE,
};

struct hal_rx_user_status {
	u32 mcs:4,
	nss:3,
	ofdma_info_valid:1,
	dl_ofdma_ru_start_index:7,
	dl_ofdma_ru_width:7,
	dl_ofdma_ru_size:8;
	u32 ul_ofdma_user_v0_word0;
	u32 ul_ofdma_user_v0_word1;
	u32 ast_index;
	u32 tid;
	u16 tcp_msdu_count;
	u16 udp_msdu_count;
	u16 other_msdu_count;
	u16 frame_control;
	u8 frame_control_info_valid;
	u8 data_sequence_control_info_valid;
	u16 first_data_seq_ctrl;
	u32 preamble_type;
	u16 ht_flags;
	u16 vht_flags;
	u16 he_flags;
	u8 rs_flags;

Annotation

• Detected declarations: `struct hal_rx_wbm_rel_info`, `struct hal_rx_mon_status_tlv_hdr`, `struct hal_rx_user_status`, `struct hal_sw_mon_ring_entries`, `struct hal_rx_mon_ppdu_info`, `struct hal_rx_ppdu_start`, `struct hal_rx_ppdu_end_user_stats`, `struct hal_rx_ppdu_end_user_stats_ext`, `struct hal_rx_ht_sig_info`, `struct hal_rx_lsig_b_info`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.