drivers/net/wireless/ath/ath12k/ahb.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath12k/ahb.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath12k/ahb.c- Extension
.c- Size
- 31711 bytes
- Lines
- 1231
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dma-mapping.hlinux/firmware/qcom/qcom_scm.hlinux/of.hlinux/of_device.hlinux/platform_device.hlinux/remoteproc.hlinux/soc/qcom/mdt_loader.hlinux/soc/qcom/smem_state.hahb.hdebug.hhif.h
Detected Declarations
enum ext_irq_numfunction ath12k_ahb_read32function ath12k_ahb_write32function ath12k_ahb_cancel_workqueuefunction ath12k_ahb_ext_grp_disablefunction __ath12k_ahb_ext_irq_disablefunction ath12k_ahb_ext_grp_enablefunction ath12k_ahb_setbit32function ath12k_ahb_clearbit32function ath12k_ahb_ce_irq_enablefunction ath12k_ahb_ce_irq_disablefunction ath12k_ahb_sync_ce_irqsfunction ath12k_ahb_sync_ext_irqsfunction ath12k_ahb_ce_irqs_enablefunction ath12k_ahb_ce_irqs_disablefunction ath12k_ahb_startfunction ath12k_ahb_ext_irq_enablefunction ath12k_ahb_ext_irq_disablefunction ath12k_ahb_stopfunction ath12k_ahb_power_upfunction ath12k_ahb_power_downfunction ath12k_ahb_init_qmi_ce_configfunction ath12k_ahb_ce_workqueuefunction ath12k_ahb_ce_interrupt_handlerfunction ath12k_ahb_ext_grp_napi_pollfunction ath12k_ahb_ext_interrupt_handlerfunction ath12k_ahb_config_ext_irqfunction ath12k_ahb_config_irqfunction ath12k_ahb_map_service_to_pipefunction ath12k_userpd_irq_handlerfunction ath12k_ahb_config_rproc_irqfunction ath12k_ahb_root_pd_state_notifierfunction ath12k_ahb_register_rproc_notifierfunction ath12k_ahb_unregister_rproc_notifierfunction ath12k_ahb_get_rprocfunction ath12k_ahb_boot_root_pdfunction ath12k_ahb_configure_rprocfunction ath12k_ahb_deconfigure_rprocfunction ath12k_ahb_resource_initfunction ath12k_ahb_resource_deinitfunction ath12k_ahb_get_device_familyfunction ath12k_ahb_probefunction ath12k_ahb_remove_preparefunction ath12k_ahb_free_resourcesfunction ath12k_ahb_removefunction ath12k_ahb_register_driverfunction ath12k_ahb_unregister_driverexport ath12k_ahb_register_driver
Annotated Snippet
if (irq_grp->napi_enabled) {
napi_synchronize(&irq_grp->napi);
napi_disable(&irq_grp->napi);
irq_grp->napi_enabled = false;
}
}
}
static void ath12k_ahb_ext_grp_enable(struct ath12k_ext_irq_grp *irq_grp)
{
int i;
for (i = 0; i < irq_grp->num_irq; i++)
enable_irq(irq_grp->ab->irq_num[irq_grp->irqs[i]]);
}
static void ath12k_ahb_setbit32(struct ath12k_base *ab, u8 bit, u32 offset)
{
u32 val;
val = ath12k_ahb_read32(ab, offset);
ath12k_ahb_write32(ab, offset, val | BIT(bit));
}
static void ath12k_ahb_clearbit32(struct ath12k_base *ab, u8 bit, u32 offset)
{
u32 val;
val = ath12k_ahb_read32(ab, offset);
ath12k_ahb_write32(ab, offset, val & ~BIT(bit));
}
static void ath12k_ahb_ce_irq_enable(struct ath12k_base *ab, u16 ce_id)
{
const struct ce_attr *ce_attr;
const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr;
u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
ie1_reg_addr = ce_ie_addr->ie1_reg_addr;
ie2_reg_addr = ce_ie_addr->ie2_reg_addr;
ie3_reg_addr = ce_ie_addr->ie3_reg_addr;
ce_attr = &ab->hw_params->host_ce_config[ce_id];
if (ce_attr->src_nentries)
ath12k_ahb_setbit32(ab, ce_id, ie1_reg_addr);
if (ce_attr->dest_nentries) {
ath12k_ahb_setbit32(ab, ce_id, ie2_reg_addr);
ath12k_ahb_setbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
ie3_reg_addr);
}
}
static void ath12k_ahb_ce_irq_disable(struct ath12k_base *ab, u16 ce_id)
{
const struct ce_attr *ce_attr;
const struct ce_ie_addr *ce_ie_addr = ab->hw_params->ce_ie_addr;
u32 ie1_reg_addr, ie2_reg_addr, ie3_reg_addr;
ie1_reg_addr = ce_ie_addr->ie1_reg_addr;
ie2_reg_addr = ce_ie_addr->ie2_reg_addr;
ie3_reg_addr = ce_ie_addr->ie3_reg_addr;
ce_attr = &ab->hw_params->host_ce_config[ce_id];
if (ce_attr->src_nentries)
ath12k_ahb_clearbit32(ab, ce_id, ie1_reg_addr);
if (ce_attr->dest_nentries) {
ath12k_ahb_clearbit32(ab, ce_id, ie2_reg_addr);
ath12k_ahb_clearbit32(ab, ce_id + CE_HOST_IE_3_SHIFT,
ie3_reg_addr);
}
}
static void ath12k_ahb_sync_ce_irqs(struct ath12k_base *ab)
{
int i;
int irq_idx;
for (i = 0; i < ab->hw_params->ce_count; i++) {
if (ath12k_ce_get_attr_flags(ab, i) & CE_ATTR_DIS_INTR)
continue;
irq_idx = ATH12K_IRQ_CE0_OFFSET + i;
synchronize_irq(ab->irq_num[irq_idx]);
}
}
static void ath12k_ahb_sync_ext_irqs(struct ath12k_base *ab)
{
Annotation
- Immediate include surface: `linux/dma-mapping.h`, `linux/firmware/qcom/qcom_scm.h`, `linux/of.h`, `linux/of_device.h`, `linux/platform_device.h`, `linux/remoteproc.h`, `linux/soc/qcom/mdt_loader.h`, `linux/soc/qcom/smem_state.h`.
- Detected declarations: `enum ext_irq_num`, `function ath12k_ahb_read32`, `function ath12k_ahb_write32`, `function ath12k_ahb_cancel_workqueue`, `function ath12k_ahb_ext_grp_disable`, `function __ath12k_ahb_ext_irq_disable`, `function ath12k_ahb_ext_grp_enable`, `function ath12k_ahb_setbit32`, `function ath12k_ahb_clearbit32`, `function ath12k_ahb_ce_irq_enable`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.