drivers/net/wireless/ath/ath12k/debugfs_htt_stats.h
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath12k/debugfs_htt_stats.h- Extension
.h- Size
- 77711 bytes
- Lines
- 2186
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dp_htt.h
Detected Declarations
struct ath12k_htt_extd_stats_msgstruct debug_htt_stats_reqstruct ath12k_htt_tx_pdev_stats_cmn_tlvstruct ath12k_htt_tx_pdev_stats_urrn_tlvstruct ath12k_htt_tx_pdev_stats_flush_tlvstruct ath12k_htt_tx_pdev_stats_phy_err_tlvstruct ath12k_htt_tx_pdev_stats_sifs_tlvstruct ath12k_htt_pdev_ctrl_path_tx_stats_tlvstruct ath12k_htt_tx_pdev_stats_sifs_hist_tlvstruct ath12k_htt_tx_pdev_mu_ppdu_dist_stats_tlvstruct ath12k_htt_tx_pdev_rate_stats_tlvstruct ath12k_htt_tx_histogram_stats_tlvstruct ath12k_htt_rx_pdev_rate_stats_tlvstruct ath12k_htt_rx_pdev_rate_ext_stats_tlvstruct ath12k_htt_stats_tx_sched_cmn_tlvstruct ath12k_htt_tx_pdev_stats_sched_per_txq_tlvstruct ath12k_htt_sched_txq_cmd_posted_tlvstruct ath12k_htt_sched_txq_cmd_reaped_tlvstruct ath12k_htt_sched_txq_sched_order_su_tlvstruct ath12k_htt_sched_txq_sched_ineligibility_tlvstruct ath12k_htt_sched_txq_supercycle_triggers_tlvstruct ath12k_htt_hw_stats_pdev_errs_tlvstruct ath12k_htt_hw_stats_intr_misc_tlvstruct ath12k_htt_hw_stats_whal_tx_tlvstruct ath12k_htt_hw_war_stats_tlvstruct ath12k_htt_tx_tqm_cmn_stats_tlvstruct ath12k_htt_tx_tqm_error_stats_tlvstruct ath12k_htt_tx_tqm_gen_mpdu_stats_tlvstruct ath12k_htt_tx_tqm_list_mpdu_stats_tlvstruct ath12k_htt_tx_tqm_list_mpdu_cnt_tlvstruct ath12k_htt_tx_tqm_pdev_stats_tlvstruct ath12k_htt_tx_de_cmn_stats_tlvstruct ath12k_htt_tx_de_eapol_packets_stats_tlvstruct ath12k_htt_tx_de_classify_stats_tlvstruct ath12k_htt_tx_de_classify_failed_stats_tlvstruct ath12k_htt_tx_de_classify_status_stats_tlvstruct ath12k_htt_tx_de_enqueue_packets_stats_tlvstruct ath12k_htt_tx_de_enqueue_discard_stats_tlvstruct ath12k_htt_tx_de_compl_stats_tlvstruct ath12k_htt_tx_selfgen_cmn_stats_tlvstruct ath12k_htt_tx_selfgen_ac_stats_tlvstruct ath12k_htt_tx_selfgen_ax_stats_tlvstruct ath12k_htt_tx_selfgen_be_stats_tlvstruct ath12k_htt_tx_selfgen_ac_err_stats_tlvstruct ath12k_htt_tx_selfgen_ax_err_stats_tlvstruct ath12k_htt_tx_selfgen_be_err_stats_tlvstruct ath12k_htt_tx_selfgen_ac_sched_status_stats_tlvstruct ath12k_htt_tx_selfgen_ax_sched_status_stats_tlv
Annotated Snippet
struct ath12k_htt_extd_stats_msg {
__le32 info0;
__le64 cookie;
__le32 info1;
u8 data[];
} __packed;
/* htt_dbg_ext_stats_type */
enum ath12k_dbg_htt_ext_stats_type {
ATH12K_DBG_HTT_EXT_STATS_RESET = 0,
ATH12K_DBG_HTT_EXT_STATS_PDEV_TX = 1,
ATH12K_DBG_HTT_EXT_STATS_PDEV_RX = 2,
ATH12K_DBG_HTT_EXT_STATS_PDEV_TX_HWQ = 3,
ATH12K_DBG_HTT_EXT_STATS_PDEV_TX_SCHED = 4,
ATH12K_DBG_HTT_EXT_STATS_PDEV_ERROR = 5,
ATH12K_DBG_HTT_EXT_STATS_PDEV_TQM = 6,
ATH12K_DBG_HTT_EXT_STATS_TX_DE_INFO = 8,
ATH12K_DBG_HTT_EXT_STATS_PDEV_TX_RATE = 9,
ATH12K_DBG_HTT_EXT_STATS_PDEV_RX_RATE = 10,
ATH12K_DBG_HTT_EXT_STATS_TX_SELFGEN_INFO = 12,
ATH12K_DBG_HTT_EXT_STATS_SRNG_INFO = 15,
ATH12K_DBG_HTT_EXT_STATS_SFM_INFO = 16,
ATH12K_DBG_HTT_EXT_STATS_PDEV_TX_MU = 17,
ATH12K_DBG_HTT_EXT_STATS_PDEV_CCA_STATS = 19,
ATH12K_DBG_HTT_EXT_STATS_TX_SOUNDING_INFO = 22,
ATH12K_DBG_HTT_EXT_STATS_PDEV_OBSS_PD_STATS = 23,
ATH12K_DBG_HTT_EXT_STATS_LATENCY_PROF_STATS = 25,
ATH12K_DBG_HTT_EXT_STATS_PDEV_UL_TRIG_STATS = 26,
ATH12K_DBG_HTT_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS = 27,
ATH12K_DBG_HTT_EXT_STATS_FSE_RX = 28,
ATH12K_DBG_HTT_EXT_STATS_PDEV_RX_RATE_EXT = 30,
ATH12K_DBG_HTT_EXT_STATS_PDEV_TX_RATE_TXBF = 31,
ATH12K_DBG_HTT_EXT_STATS_TXBF_OFDMA = 32,
ATH12K_DBG_HTT_EXT_STATS_DLPAGER_STATS = 36,
ATH12K_DBG_HTT_EXT_PHY_COUNTERS_AND_PHY_STATS = 37,
ATH12K_DBG_HTT_EXT_VDEVS_TXRX_STATS = 38,
ATH12K_DBG_HTT_EXT_PDEV_PER_STATS = 40,
ATH12K_DBG_HTT_EXT_AST_ENTRIES = 41,
ATH12K_DBG_HTT_EXT_STATS_SOC_ERROR = 45,
ATH12K_DBG_HTT_DBG_PDEV_PUNCTURE_STATS = 46,
ATH12K_DBG_HTT_EXT_STATS_PDEV_SCHED_ALGO = 49,
ATH12K_DBG_HTT_EXT_STATS_MANDATORY_MUOFDMA = 51,
ATH12K_DGB_HTT_EXT_STATS_PDEV_MBSSID_CTRL_FRAME = 54,
ATH12K_DBG_HTT_PDEV_TDMA_STATS = 57,
ATH12K_DBG_HTT_MLO_SCHED_STATS = 63,
ATH12K_DBG_HTT_PDEV_MLO_IPC_STATS = 64,
ATH12K_DBG_HTT_EXT_PDEV_RTT_RESP_STATS = 65,
ATH12K_DBG_HTT_EXT_PDEV_RTT_INITIATOR_STATS = 66,
ATH12K_DBG_HTT_EXT_CHAN_SWITCH_STATS = 76,
/* keep this last */
ATH12K_DBG_HTT_NUM_EXT_STATS,
};
enum ath12k_dbg_htt_tlv_tag {
HTT_STATS_TX_PDEV_CMN_TAG = 0,
HTT_STATS_TX_PDEV_UNDERRUN_TAG = 1,
HTT_STATS_TX_PDEV_SIFS_TAG = 2,
HTT_STATS_TX_PDEV_FLUSH_TAG = 3,
HTT_STATS_STRING_TAG = 5,
HTT_STATS_TX_HWQ_CMN_TAG = 6,
HTT_STATS_TX_TQM_GEN_MPDU_TAG = 11,
HTT_STATS_TX_TQM_LIST_MPDU_TAG = 12,
HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG = 13,
HTT_STATS_TX_TQM_CMN_TAG = 14,
HTT_STATS_TX_TQM_PDEV_TAG = 15,
HTT_STATS_TX_DE_EAPOL_PACKETS_TAG = 17,
HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG = 18,
HTT_STATS_TX_DE_CLASSIFY_STATS_TAG = 19,
HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG = 20,
HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG = 21,
HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG = 22,
HTT_STATS_TX_DE_CMN_TAG = 23,
HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG = 25,
HTT_STATS_SFM_CMN_TAG = 26,
HTT_STATS_SRING_STATS_TAG = 27,
HTT_STATS_RX_PDEV_FW_STATS_TAG = 28,
HTT_STATS_TX_PDEV_RATE_STATS_TAG = 34,
HTT_STATS_RX_PDEV_RATE_STATS_TAG = 35,
HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG = 36,
HTT_STATS_TX_SCHED_CMN_TAG = 37,
HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG = 39,
HTT_STATS_SFM_CLIENT_USER_TAG = 41,
HTT_STATS_SFM_CLIENT_TAG = 42,
HTT_STATS_TX_TQM_ERROR_STATS_TAG = 43,
HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG = 44,
HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG = 46,
HTT_STATS_TX_SELFGEN_CMN_STATS_TAG = 47,
HTT_STATS_TX_SELFGEN_AC_STATS_TAG = 48,
HTT_STATS_TX_SELFGEN_AX_STATS_TAG = 49,
Annotation
- Immediate include surface: `dp_htt.h`.
- Detected declarations: `struct ath12k_htt_extd_stats_msg`, `struct debug_htt_stats_req`, `struct ath12k_htt_tx_pdev_stats_cmn_tlv`, `struct ath12k_htt_tx_pdev_stats_urrn_tlv`, `struct ath12k_htt_tx_pdev_stats_flush_tlv`, `struct ath12k_htt_tx_pdev_stats_phy_err_tlv`, `struct ath12k_htt_tx_pdev_stats_sifs_tlv`, `struct ath12k_htt_pdev_ctrl_path_tx_stats_tlv`, `struct ath12k_htt_tx_pdev_stats_sifs_hist_tlv`, `struct ath12k_htt_tx_pdev_mu_ppdu_dist_stats_tlv`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.