drivers/net/wireless/ath/ath12k/hal.h

File Facts

System

Linux kernel

Corpus path

drivers/net/wireless/ath/ath12k/hal.h

Extension

.h

Size

43724 bytes

Lines

1562

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• hw.h

Detected Declarations

• struct ath12k_base
• struct hal_wbm_idle_scatter_list
• struct hal_srng_params
• struct hal_rx_user_status
• struct hal_rx_u_sig_info
• struct hal_rx_tlv_aggr_info
• struct hal_rx_radiotap_eht
• struct hal_rx_eht_info
• struct hal_rx_msdu_desc_info
• struct hal_mon_buf_ring
• struct hal_rx_mon_ppdu_info
• struct hal_rx_desc_data
• struct ath12k_buffer_addr
• struct hal_ce_srng_dest_desc
• struct hal_ce_srng_dst_status_desc
• struct hal_ce_srng_src_desc
• struct hal_wbm_link_desc
• struct hal_srng
• struct hal_srng_config
• struct ath12k_hal_reo_cmd
• struct hal_reo_status_header
• struct ath12k_hw_hal_params
• struct ath12k_hw_regs
• struct ath12k_hal
• struct ath12k_hal_tcl_to_wbm_rbm_map
• struct ath12k_hw_version_map
• struct hal_ops
• struct hal_tlv_hdr
• struct hal_tlv_64_hdr
• enum hal_srng_ring_id
• enum hal_rx_su_mu_coding
• enum hal_rx_gi
• enum hal_rx_bw
• enum hal_rx_preamble
• enum hal_rx_reception_type
• enum hal_rx_legacy_rate
• enum hal_rx_legacy_rates_ofdm
• enum hal_ring_type
• enum hal_reo_cmd_type
• enum hal_reo_cmd_status
• enum hal_tcl_encap_type
• enum hal_tcl_desc_type
• enum hal_reo_dest_ring_buffer_type
• enum hal_reo_dest_ring_push_reason
• enum hal_reo_entr_rxdma_push_reason
• enum hal_reo_dest_ring_error_code
• enum hal_reo_entr_rxdma_ecode
• enum hal_wbm_htt_tx_comp_status

Annotated Snippet

struct hal_wbm_idle_scatter_list {
	dma_addr_t paddr;
	struct hal_wbm_link_desc *vaddr;
};

struct hal_srng_params {
	dma_addr_t ring_base_paddr;
	u32 *ring_base_vaddr;
	int num_entries;
	u32 intr_batch_cntr_thres_entries;
	u32 intr_timer_thres_us;
	u32 flags;
	u32 max_buffer_len;
	u32 low_threshold;
	u32 high_threshold;
	dma_addr_t msi_addr;
	dma_addr_t msi2_addr;
	u32 msi_data;
	u32 msi2_data;

	/* Add more params as needed */
};

enum hal_srng_dir {
	HAL_SRNG_DIR_SRC,
	HAL_SRNG_DIR_DST
};

enum rx_msdu_start_pkt_type {
	RX_MSDU_START_PKT_TYPE_11A,
	RX_MSDU_START_PKT_TYPE_11B,
	RX_MSDU_START_PKT_TYPE_11N,
	RX_MSDU_START_PKT_TYPE_11AC,
	RX_MSDU_START_PKT_TYPE_11AX,
	RX_MSDU_START_PKT_TYPE_11BA,
	RX_MSDU_START_PKT_TYPE_11BE,
};

enum rx_msdu_start_sgi {
	RX_MSDU_START_SGI_0_8_US,
	RX_MSDU_START_SGI_0_4_US,
	RX_MSDU_START_SGI_1_6_US,
	RX_MSDU_START_SGI_3_2_US,
};

enum rx_msdu_start_recv_bw {
	RX_MSDU_START_RECV_BW_20MHZ,
	RX_MSDU_START_RECV_BW_40MHZ,
	RX_MSDU_START_RECV_BW_80MHZ,
	RX_MSDU_START_RECV_BW_160MHZ,
};

enum rx_msdu_start_reception_type {
	RX_MSDU_START_RECEPTION_TYPE_SU,
	RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO,
	RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA,
	RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO,
	RX_MSDU_START_RECEPTION_TYPE_UL_MU_MIMO,
	RX_MSDU_START_RECEPTION_TYPE_UL_MU_OFDMA,
	RX_MSDU_START_RECEPTION_TYPE_UL_MU_OFDMA_MIMO,
};

enum rx_desc_decap_type {
	RX_DESC_DECAP_TYPE_RAW,
	RX_DESC_DECAP_TYPE_NATIVE_WIFI,
	RX_DESC_DECAP_TYPE_ETHERNET2_DIX,
	RX_DESC_DECAP_TYPE_8023,
};

struct hal_rx_user_status {
	u32 mcs:4,
	nss:3,
	ofdma_info_valid:1,
	ul_ofdma_ru_start_index:7,
	ul_ofdma_ru_width:7,
	ul_ofdma_ru_size:8;
	u32 ul_ofdma_user_v0_word0;
	u32 ul_ofdma_user_v0_word1;
	u32 ast_index;
	u32 tid;
	u16 tcp_msdu_count;
	u16 tcp_ack_msdu_count;
	u16 udp_msdu_count;
	u16 other_msdu_count;
	u16 frame_control;
	u8 frame_control_info_valid;
	u8 data_sequence_control_info_valid;
	u16 first_data_seq_ctrl;
	u32 preamble_type;
	u16 ht_flags;

Annotation

• Immediate include surface: `hw.h`.
• Detected declarations: `struct ath12k_base`, `struct hal_wbm_idle_scatter_list`, `struct hal_srng_params`, `struct hal_rx_user_status`, `struct hal_rx_u_sig_info`, `struct hal_rx_tlv_aggr_info`, `struct hal_rx_radiotap_eht`, `struct hal_rx_eht_info`, `struct hal_rx_msdu_desc_info`, `struct hal_mon_buf_ring`.
• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.