drivers/net/wireless/ath/ath12k/wifi7/hal_qcn9274.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath12k/wifi7/hal_qcn9274.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath12k/wifi7/hal_qcn9274.c- Extension
.c- Size
- 39503 bytes
- Lines
- 1143
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
hal_desc.hhal_qcn9274.hhw.hhal.hhal_tx.h
Detected Declarations
function ath12k_hal_rx_desc_get_first_msdu_qcn9274function ath12k_hal_rx_desc_get_last_msdu_qcn9274function ath12k_hal_rx_desc_get_l3_pad_bytes_qcn9274function ath12k_hal_rx_desc_encrypt_valid_qcn9274function ath12k_hal_rx_desc_get_encrypt_type_qcn9274function ath12k_hal_rx_desc_get_decap_type_qcn9274function ath12k_hal_rx_desc_get_mesh_ctl_qcn9274function ath12k_hal_rx_desc_get_mpdu_seq_ctl_vld_qcn9274function ath12k_hal_rx_desc_get_mpdu_fc_valid_qcn9274function ath12k_hal_rx_desc_get_mpdu_start_seq_no_qcn9274function ath12k_hal_rx_desc_get_msdu_len_qcn9274function ath12k_hal_rx_desc_get_msdu_sgi_qcn9274function ath12k_hal_rx_desc_get_msdu_rate_mcs_qcn9274function ath12k_hal_rx_desc_get_msdu_rx_bw_qcn9274function ath12k_hal_rx_desc_get_msdu_freq_qcn9274function ath12k_hal_rx_desc_get_msdu_pkt_type_qcn9274function ath12k_hal_rx_desc_get_msdu_nss_qcn9274function ath12k_hal_rx_desc_get_mpdu_tid_qcn9274function ath12k_wifi7_hal_rx_h_from_ds_qcn9274function ath12k_wifi7_hal_rx_h_to_ds_qcn9274function ath12k_hal_rx_desc_get_mpdu_peer_id_qcn9274function ath12k_hal_rx_desc_copy_end_tlv_qcn9274function ath12k_hal_rx_desc_get_mpdu_ppdu_id_qcn9274function ath12k_hal_rx_desc_set_msdu_len_qcn9274function ath12k_hal_rx_desc_get_mpdu_start_offset_qcn9274function ath12k_hal_rx_desc_get_msdu_end_offset_qcn9274function ath12k_hal_rx_desc_mac_addr2_valid_qcn9274function ath12k_hal_rx_desc_is_da_mcbc_qcn9274function ath12k_hal_rx_h_msdu_done_qcn9274function ath12k_hal_rx_h_l4_cksum_fail_qcn9274function ath12k_hal_rx_h_ip_cksum_fail_qcn9274function ath12k_hal_rx_h_is_decrypted_qcn9274function ath12k_hal_get_rx_desc_size_qcn9274function ath12k_hal_rx_desc_get_msdu_src_link_qcn9274function ath12k_hal_rx_mpdu_start_wmask_get_qcn9274function ath12k_hal_rx_msdu_end_wmask_get_qcn9274function ath12k_hal_rx_h_mpdu_err_qcn9274function ath12k_hal_rx_desc_get_crypto_hdr_qcn9274function ath12k_hal_rx_desc_get_dot11_hdr_qcn9274function ath12k_hal_extract_rx_desc_data_qcn9274function ath12k_hal_srng_create_config_qcn9274
Annotated Snippet
// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
* Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
*/
#include "hal_desc.h"
#include "hal_qcn9274.h"
#include "hw.h"
#include "hal.h"
#include "hal_tx.h"
static const struct hal_srng_config hw_srng_config_template[] = {
/* TODO: max_rings can populated by querying HW capabilities */
[HAL_REO_DST] = {
.start_ring_id = HAL_SRNG_RING_ID_REO2SW1,
.max_rings = 8,
.entry_size = sizeof(struct hal_reo_dest_ring) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_DST,
.max_size = HAL_REO_REO2SW1_RING_BASE_MSB_RING_SIZE,
},
[HAL_REO_EXCEPTION] = {
/* Designating REO2SW0 ring as exception ring.
* Any of theREO2SW rings can be used as exception ring.
*/
.start_ring_id = HAL_SRNG_RING_ID_REO2SW0,
.max_rings = 1,
.entry_size = sizeof(struct hal_reo_dest_ring) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_DST,
.max_size = HAL_REO_REO2SW0_RING_BASE_MSB_RING_SIZE,
},
[HAL_REO_REINJECT] = {
.start_ring_id = HAL_SRNG_RING_ID_SW2REO,
.max_rings = 4,
.entry_size = sizeof(struct hal_reo_entrance_ring) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_SRC,
.max_size = HAL_REO_SW2REO_RING_BASE_MSB_RING_SIZE,
},
[HAL_REO_CMD] = {
.start_ring_id = HAL_SRNG_RING_ID_REO_CMD,
.max_rings = 1,
.entry_size = (sizeof(struct hal_tlv_64_hdr) +
sizeof(struct hal_reo_get_queue_stats)) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_SRC,
.max_size = HAL_REO_CMD_RING_BASE_MSB_RING_SIZE,
},
[HAL_REO_STATUS] = {
.start_ring_id = HAL_SRNG_RING_ID_REO_STATUS,
.max_rings = 1,
.entry_size = (sizeof(struct hal_tlv_64_hdr) +
sizeof(struct hal_reo_get_queue_stats_status)) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_DST,
.max_size = HAL_REO_STATUS_RING_BASE_MSB_RING_SIZE,
},
[HAL_TCL_DATA] = {
.start_ring_id = HAL_SRNG_RING_ID_SW2TCL1,
.max_rings = 6,
.entry_size = sizeof(struct hal_tcl_data_cmd) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_SRC,
.max_size = HAL_SW2TCL1_RING_BASE_MSB_RING_SIZE,
},
[HAL_TCL_CMD] = {
.start_ring_id = HAL_SRNG_RING_ID_SW2TCL_CMD,
.max_rings = 1,
.entry_size = sizeof(struct hal_tcl_gse_cmd) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_SRC,
.max_size = HAL_SW2TCL1_CMD_RING_BASE_MSB_RING_SIZE,
},
[HAL_TCL_STATUS] = {
.start_ring_id = HAL_SRNG_RING_ID_TCL_STATUS,
.max_rings = 1,
.entry_size = (sizeof(struct hal_tlv_hdr) +
sizeof(struct hal_tcl_status_ring)) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_DST,
.max_size = HAL_TCL_STATUS_RING_BASE_MSB_RING_SIZE,
},
[HAL_CE_SRC] = {
.start_ring_id = HAL_SRNG_RING_ID_CE0_SRC,
.max_rings = 16,
.entry_size = sizeof(struct hal_ce_srng_src_desc) >> 2,
.mac_type = ATH12K_HAL_SRNG_UMAC,
.ring_dir = HAL_SRNG_DIR_SRC,
.max_size = HAL_CE_SRC_RING_BASE_MSB_RING_SIZE,
Annotation
- Immediate include surface: `hal_desc.h`, `hal_qcn9274.h`, `hw.h`, `hal.h`, `hal_tx.h`.
- Detected declarations: `function ath12k_hal_rx_desc_get_first_msdu_qcn9274`, `function ath12k_hal_rx_desc_get_last_msdu_qcn9274`, `function ath12k_hal_rx_desc_get_l3_pad_bytes_qcn9274`, `function ath12k_hal_rx_desc_encrypt_valid_qcn9274`, `function ath12k_hal_rx_desc_get_encrypt_type_qcn9274`, `function ath12k_hal_rx_desc_get_decap_type_qcn9274`, `function ath12k_hal_rx_desc_get_mesh_ctl_qcn9274`, `function ath12k_hal_rx_desc_get_mpdu_seq_ctl_vld_qcn9274`, `function ath12k_hal_rx_desc_get_mpdu_fc_valid_qcn9274`, `function ath12k_hal_rx_desc_get_mpdu_start_seq_no_qcn9274`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.