drivers/net/wireless/ath/ath5k/base.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath5k/base.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath5k/base.c- Extension
.c- Size
- 86981 bytes
- Lines
- 3248
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/delay.hlinux/dma-mapping.hlinux/hardirq.hlinux/if.hlinux/io.hlinux/netdevice.hlinux/cache.hlinux/ethtool.hlinux/uaccess.hlinux/slab.hlinux/etherdevice.hlinux/nl80211.hnet/cfg80211.hnet/ieee80211_radiotap.hlinux/unaligned.hnet/mac80211.hbase.hreg.hdebug.hani.hath5k.h../regd.htrace.h
Detected Declarations
function ath5k_extend_tsffunction ath5k_chip_namefunction ath5k_ioread32function ath5k_iowrite32function ath5k_reg_notifierfunction ath5k_is_standard_channelfunction ath5k_is_standard_channelfunction ath5k_setup_channelsfunction ath5k_setup_rate_idxfunction ath5k_setup_bandsfunction ath5k_chan_setfunction ath5k_vif_iterfunction ath5k_update_bssid_mask_and_opmodefunction ath5k_hw_to_driver_rixfunction ath5k_rxbuf_setupfunction get_hw_packet_typefunction ath5k_get_ratefunction ath5k_get_rate_hw_valuefunction ath5k_merge_ratetblfunction ath5k_txbuf_setupfunction powerfunction ath5k_desc_allocfunction ath5k_txbuf_free_skbfunction ath5k_rxbuf_free_skbfunction ath5k_desc_freefunction ath5k_txq_setupfunction ath5k_beaconq_setupfunction ath5k_beaconq_configfunction ath5k_drain_tx_buffsfunction list_for_each_entry_safefunction ath5k_txq_releasefunction ath5k_rx_startfunction PCUfunction ath5k_rx_decryptedfunction ath5k_check_ibss_tsffunction bytefunction ath5k_common_padposfunction ath5k_add_paddingfunction ath5k_remove_paddingfunction ath5k_receive_framefunction ath5k_receive_frame_okfunction ath5k_set_current_imaskfunction ath5k_tasklet_rxfunction ath5k_tx_queuefunction ath5k_tx_frame_completedfunction ath5k_tx_processqfunction ath5k_tasklet_txfunction ath5k_beacon_setup
Annotated Snippet
if ((val & 0xff) == srev_names[i].sr_val) {
name = srev_names[i].sr_name;
break;
}
}
return name;
}
static unsigned int ath5k_ioread32(void *hw_priv, u32 reg_offset)
{
struct ath5k_hw *ah = hw_priv;
return ath5k_hw_reg_read(ah, reg_offset);
}
static void ath5k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
{
struct ath5k_hw *ah = hw_priv;
ath5k_hw_reg_write(ah, val, reg_offset);
}
static const struct ath_ops ath5k_common_ops = {
.read = ath5k_ioread32,
.write = ath5k_iowrite32,
};
/***********************\
* Driver Initialization *
\***********************/
static void ath5k_reg_notifier(struct wiphy *wiphy,
struct regulatory_request *request)
{
struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
struct ath5k_hw *ah = hw->priv;
struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
ath_reg_notifier_apply(wiphy, request, regulatory);
}
/********************\
* Channel/mode setup *
\********************/
/*
* Returns true for the channel numbers used.
*/
#ifdef CONFIG_ATH5K_TEST_CHANNELS
static bool ath5k_is_standard_channel(short chan, enum nl80211_band band)
{
return true;
}
#else
static bool ath5k_is_standard_channel(short chan, enum nl80211_band band)
{
if (band == NL80211_BAND_2GHZ && chan <= 14)
return true;
return /* UNII 1,2 */
(((chan & 3) == 0 && chan >= 36 && chan <= 64) ||
/* midband */
((chan & 3) == 0 && chan >= 100 && chan <= 140) ||
/* UNII-3 */
((chan & 3) == 1 && chan >= 149 && chan <= 165) ||
/* 802.11j 5.030-5.080 GHz (20MHz) */
(chan == 8 || chan == 12 || chan == 16) ||
/* 802.11j 4.9GHz (20MHz) */
(chan == 184 || chan == 188 || chan == 192 || chan == 196));
}
#endif
static unsigned int
ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
unsigned int mode, unsigned int max)
{
unsigned int count, size, freq, ch;
enum nl80211_band band;
switch (mode) {
case AR5K_MODE_11A:
/* 1..220, but 2GHz frequencies are filtered by check_channel */
size = 220;
band = NL80211_BAND_5GHZ;
break;
case AR5K_MODE_11B:
case AR5K_MODE_11G:
size = 26;
band = NL80211_BAND_2GHZ;
break;
default:
Annotation
- Immediate include surface: `linux/module.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/hardirq.h`, `linux/if.h`, `linux/io.h`, `linux/netdevice.h`, `linux/cache.h`.
- Detected declarations: `function ath5k_extend_tsf`, `function ath5k_chip_name`, `function ath5k_ioread32`, `function ath5k_iowrite32`, `function ath5k_reg_notifier`, `function ath5k_is_standard_channel`, `function ath5k_is_standard_channel`, `function ath5k_setup_channels`, `function ath5k_setup_rate_idx`, `function ath5k_setup_bands`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.