drivers/net/wireless/ath/ath5k/phy.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath5k/phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath5k/phy.c- Extension
.c- Size
- 110324 bytes
- Lines
- 3953
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/slab.hlinux/sort.hlinux/unaligned.hath5k.hreg.hrfbuffer.hrfgain.h../regd.h
Detected Declarations
function Copyrightfunction ath5k_channel_okfunction ath5k_hw_chan_has_spur_noisefunction ath5k_hw_rfb_opfunction ath5k_hw_write_ofdm_timingsfunction ath5k_hw_phy_disablefunction ath5k_hw_wait_for_synthfunction ath5k_hw_rfgain_opt_initfunction ath5k_hw_request_rfgain_probefunction ath5k_hw_rf_gainf_corrfunction ath5k_hw_rf_check_gainf_readbackfunction ath5k_hw_rf_gainf_adjustfunction ath5k_hw_gainf_calibratefunction ath5k_hw_rfgain_initfunction ath5k_hw_rfregs_initfunction ath5k_hw_rf5110_chan2athchanfunction ath5k_hw_rf5110_channelfunction ath5k_hw_rf5111_chan2athchanfunction ath5k_hw_rf5111_channelfunction ath5k_hw_rf5112_channelfunction settingsfunction ath5k_hw_rf2425_channelfunction ath5k_hw_channelfunction PHYfunction AGCfunction ath5k_hw_init_nfcal_histfunction ath5k_hw_update_nfcal_histfunction cmps16function ath5k_hw_get_median_noise_floorfunction ath5k_hw_update_noise_floorfunction ath5k_hw_rf5110_calibratefunction ath5k_hw_rf511x_iq_calibratefunction ath5k_hw_phy_calibratefunction ath5k_hw_set_spur_mitigation_filterfunction ath5k_hw_set_def_antennafunction ath5k_hw_set_fast_divfunction ath5k_hw_set_antenna_switchfunction ath5k_hw_set_antenna_modefunction ath5k_get_interpolated_valuefunction ath5k_get_linear_pcdac_minfunction ath5k_create_power_curvefunction ath5k_get_chan_pcal_surrounding_piersfunction ath5k_get_rate_pcal_datafunction ath5k_get_max_ctl_powerfunction stepsfunction ath5k_combine_linear_pcdac_curvesfunction ath5k_write_pcdac_tablefunction table
Annotated Snippet
if (rf_regs[i].index == reg_id) {
rfreg = &rf_regs[i];
break;
}
}
if (rfb == NULL || rfreg == NULL) {
ATH5K_PRINTF("Rf register not found!\n");
/* should not happen */
return 0;
}
bank = rfreg->bank;
num_bits = rfreg->field.len;
first_bit = rfreg->field.pos;
col = rfreg->field.col;
/* first_bit is an offset from bank's
* start. Since we have all banks on
* the same array, we use this offset
* to mark each bank's start */
offset = ah->ah_offset[bank];
/* Boundary check */
if (!(col <= 3 && num_bits <= 32 && first_bit + num_bits <= 319)) {
ATH5K_PRINTF("invalid values at offset %u\n", offset);
return 0;
}
entry = ((first_bit - 1) / 8) + offset;
position = (first_bit - 1) % 8;
if (set)
data = ath5k_hw_bitswap(val, num_bits);
for (bits_shifted = 0, bits_left = num_bits; bits_left > 0;
position = 0, entry++) {
last_bit = (position + bits_left > 8) ? 8 :
position + bits_left;
mask = (((1 << last_bit) - 1) ^ ((1 << position) - 1)) <<
(col * 8);
if (set) {
rfb[entry] &= ~mask;
rfb[entry] |= ((data << position) << (col * 8)) & mask;
data >>= (8 - position);
} else {
data |= (((rfb[entry] & mask) >> (col * 8)) >> position)
<< bits_shifted;
bits_shifted += last_bit - position;
}
bits_left -= 8 - position;
}
data = set ? 1 : ath5k_hw_bitswap(data, num_bits);
return data;
}
/**
* ath5k_hw_write_ofdm_timings() - set OFDM timings on AR5212
* @ah: the &struct ath5k_hw
* @channel: the currently set channel upon reset
*
* Write the delta slope coefficient (used on pilot tracking ?) for OFDM
* operation on the AR5212 upon reset. This is a helper for ath5k_hw_phy_init.
*
* Since delta slope is floating point we split it on its exponent and
* mantissa and provide these values on hw.
*
* For more infos i think this patent is related
* "http://www.freepatentsonline.com/7184495.html"
*/
static inline int
ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
struct ieee80211_channel *channel)
{
/* Get exponent and mantissa and set it */
u32 coef_scaled, coef_exp, coef_man,
ds_coef_exp, ds_coef_man, clock;
BUG_ON(!(ah->ah_version == AR5K_AR5212) ||
(channel->hw_value == AR5K_MODE_11B));
/* Get coefficient
* ALGO: coef = (5 * clock / carrier_freq) / 2
* we scale coef by shifting clock value by 24 for
Annotation
- Immediate include surface: `linux/delay.h`, `linux/slab.h`, `linux/sort.h`, `linux/unaligned.h`, `ath5k.h`, `reg.h`, `rfbuffer.h`, `rfgain.h`.
- Detected declarations: `function Copyright`, `function ath5k_channel_ok`, `function ath5k_hw_chan_has_spur_noise`, `function ath5k_hw_rfb_op`, `function ath5k_hw_write_ofdm_timings`, `function ath5k_hw_phy_disable`, `function ath5k_hw_wait_for_synth`, `function ath5k_hw_rfgain_opt_init`, `function ath5k_hw_request_rfgain_probe`, `function ath5k_hw_rf_gainf_corr`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.