drivers/net/wireless/ath/ath5k/rfbuffer.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath5k/rfbuffer.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/ath/ath5k/rfbuffer.h
Extension
.h
Size
35845 bytes
Lines
854
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct ath5k_ini_rfbuffer {
	u8	rfb_bank;
	u16	rfb_ctrl_register;
	u32	rfb_mode_data[3];
};

/**
 * struct ath5k_rfb_field - An RF Buffer field (register/value)
 * @len: Field length
 * @pos: Offset on the raw packet
 * @col: Used for shifting
 *
 * Struct to hold RF Buffer field
 * infos used to access certain RF
 * analog registers
 */
struct ath5k_rfb_field {
	u8	len;
	u16	pos;
	u8	col;
};

/**
 * struct ath5k_rf_reg - RF analog register definition
 * @bank: RF Buffer Bank number
 * @index: Register's index on ath5k_rf_regx_idx
 * @field: The &struct ath5k_rfb_field
 *
 * We use this struct to define the set of RF registers
 * on each chip that we want to tweak. Some RF registers
 * are common between different chip versions so this saves
 * us space and complexity because we can refer to an rf
 * register by it's index no matter what chip we work with
 * as long as it has that register.
 */
struct ath5k_rf_reg {
	u8			bank;
	u8			index;
	struct ath5k_rfb_field	field;
};

/**
 * enum ath5k_rf_regs_idx - Map RF registers to indexes
 *
 * We do this to handle common bits and make our
 * life easier by using an index for each register
 * instead of a full rfb_field
 */
enum ath5k_rf_regs_idx {
	/* BANK 2 */
	AR5K_RF_TURBO = 0,
	/* BANK 6 */
	AR5K_RF_OB_2GHZ,
	AR5K_RF_OB_5GHZ,
	AR5K_RF_DB_2GHZ,
	AR5K_RF_DB_5GHZ,
	AR5K_RF_FIXED_BIAS_A,
	AR5K_RF_FIXED_BIAS_B,
	AR5K_RF_PWD_XPD,
	AR5K_RF_XPD_SEL,
	AR5K_RF_XPD_GAIN,
	AR5K_RF_PD_GAIN_LO,
	AR5K_RF_PD_GAIN_HI,
	AR5K_RF_HIGH_VC_CP,
	AR5K_RF_MID_VC_CP,
	AR5K_RF_LOW_VC_CP,
	AR5K_RF_PUSH_UP,
	AR5K_RF_PAD2GND,
	AR5K_RF_XB2_LVL,
	AR5K_RF_XB5_LVL,
	AR5K_RF_PWD_ICLOBUF_2G,
	AR5K_RF_PWD_84,
	AR5K_RF_PWD_90,
	AR5K_RF_PWD_130,
	AR5K_RF_PWD_131,
	AR5K_RF_PWD_132,
	AR5K_RF_PWD_136,
	AR5K_RF_PWD_137,
	AR5K_RF_PWD_138,
	AR5K_RF_PWD_166,
	AR5K_RF_PWD_167,
	AR5K_RF_DERBY_CHAN_SEL_MODE,
	/* BANK 7 */
	AR5K_RF_GAIN_I,
	AR5K_RF_PLO_SEL,
	AR5K_RF_RFGAIN_SEL,
	AR5K_RF_RFGAIN_STEP,
	AR5K_RF_WAIT_S,
	AR5K_RF_WAIT_I,
	AR5K_RF_MAX_TIME,

Annotation

Implementation Notes