drivers/net/wireless/ath/ath9k/ar5008_phy.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath9k/ar5008_phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath9k/ar5008_phy.c- Extension
.c- Size
- 39800 bytes
- Lines
- 1389
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
hw.hhw-ops.h../regd.har9002_phy.h
Detected Declarations
function ar5008_write_bank6function ar5008_hw_phy_modify_rx_bufferfunction ar5008_hw_force_biasfunction ar5008_hw_set_channelfunction ar5008_hw_cmn_spur_mitigatefunction ar5008_hw_spur_mitigatefunction ar5008_hw_rf_alloc_ext_banksfunction ar5008_hw_set_rf_regsfunction ar5008_hw_init_bbfunction ar5008_hw_init_chain_masksfunction ar5008_hw_override_inifunction ar5008_hw_set_channel_regsfunction ar5008_hw_process_inifunction ar5008_hw_set_rfmodefunction ar5008_hw_mark_phy_inactivefunction ar5008_hw_set_delta_slopefunction ar5008_hw_rfbus_reqfunction ar5008_hw_rfbus_donefunction ar5008_restore_chainmaskfunction ar9160_hw_compute_pll_controlfunction ar5008_hw_compute_pll_controlfunction ar5008_hw_ani_control_newfunction ar5008_hw_do_getnffunction defaultfunction ar5008_hw_set_nf_limitsfunction ar5008_hw_set_radar_paramsfunction ar5008_hw_set_radar_conffunction ar5008_hw_init_txpower_cckfunction ar5008_hw_init_txpower_ofdmfunction ar5008_hw_init_txpower_htfunction ar5008_hw_init_rate_txpowerfunction ar5008_hw_attach_phy_ops
Annotated Snippet
if (((freq - 2192) % 5) == 0) {
channelSel = ((freq - 672) * 2 - 3040) / 10;
bModeSynth = 0;
} else if (((freq - 2224) % 5) == 0) {
channelSel = ((freq - 704) * 2 - 3040) / 10;
bModeSynth = 1;
} else {
ath_err(common, "Invalid channel %u MHz\n", freq);
return -EINVAL;
}
channelSel = (channelSel << 2) & 0xff;
channelSel = ath9k_hw_reverse_bits(channelSel, 8);
txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
if (freq == 2484) {
REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
} else {
REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN);
}
} else if ((freq % 20) == 0 && freq >= 5120) {
channelSel =
ath9k_hw_reverse_bits(((freq - 4800) / 20 << 2), 8);
aModeRefSel = ath9k_hw_reverse_bits(1, 2);
} else if ((freq % 10) == 0) {
channelSel =
ath9k_hw_reverse_bits(((freq - 4800) / 10 << 1), 8);
if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
aModeRefSel = ath9k_hw_reverse_bits(2, 2);
else
aModeRefSel = ath9k_hw_reverse_bits(1, 2);
} else if ((freq % 5) == 0) {
channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
aModeRefSel = ath9k_hw_reverse_bits(1, 2);
} else {
ath_err(common, "Invalid channel %u MHz\n", freq);
return -EINVAL;
}
ar5008_hw_force_bias(ah, freq);
reg32 =
(channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
(1 << 5) | 0x1;
REG_WRITE(ah, AR_PHY(0x37), reg32);
ah->curchan = chan;
return 0;
}
void ar5008_hw_cmn_spur_mitigate(struct ath_hw *ah,
struct ath9k_channel *chan, int bin)
{
int cur_bin;
int upper, lower, cur_vit_mask;
int i;
int8_t mask_m[123] = {0};
int8_t mask_p[123] = {0};
int8_t mask_amt;
int tmp_mask;
static const int pilot_mask_reg[4] = {
AR_PHY_TIMING7, AR_PHY_TIMING8,
AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
};
static const int chan_mask_reg[4] = {
AR_PHY_TIMING9, AR_PHY_TIMING10,
AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
};
static const int inc[4] = { 0, 100, 0, 0 };
cur_bin = -6000;
upper = bin + 100;
lower = bin - 100;
for (i = 0; i < 4; i++) {
int pilot_mask = 0;
int chan_mask = 0;
int bp = 0;
for (bp = 0; bp < 30; bp++) {
if ((cur_bin > lower) && (cur_bin < upper)) {
pilot_mask = pilot_mask | 0x1 << bp;
chan_mask = chan_mask | 0x1 << bp;
}
Annotation
- Immediate include surface: `hw.h`, `hw-ops.h`, `../regd.h`, `ar9002_phy.h`.
- Detected declarations: `function ar5008_write_bank6`, `function ar5008_hw_phy_modify_rx_buffer`, `function ar5008_hw_force_bias`, `function ar5008_hw_set_channel`, `function ar5008_hw_cmn_spur_mitigate`, `function ar5008_hw_spur_mitigate`, `function ar5008_hw_rf_alloc_ext_banks`, `function ar5008_hw_set_rf_regs`, `function ar5008_hw_init_bb`, `function ar5008_hw_init_chain_masks`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.