drivers/net/wireless/ath/ath9k/ar9565_1p1_initvals.h

File Facts

System

Linux kernel

Corpus path

drivers/net/wireless/ath/ath9k/ar9565_1p1_initvals.h

Extension

.h

Size

2581 bytes

Lines

65

Domain

Driver Families

Bucket

drivers/net

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef INITVALS_9565_1P1_H
#define INITVALS_9565_1P1_H

/* AR9565 1.1 */

#define ar9565_1p1_mac_core ar9565_1p0_mac_core

#define ar9565_1p1_mac_postamble ar9565_1p0_mac_postamble

#define ar9565_1p1_baseband_core ar9565_1p0_baseband_core

#define ar9565_1p1_baseband_postamble ar9565_1p0_baseband_postamble

#define ar9565_1p1_radio_core ar9565_1p0_radio_core

#define ar9565_1p1_soc_preamble ar9565_1p0_soc_preamble

#define ar9565_1p1_soc_postamble ar9565_1p0_soc_postamble

#define ar9565_1p1_Common_rx_gain_table ar9565_1p0_Common_rx_gain_table

#define ar9565_1p1_Modes_lowest_ob_db_tx_gain_table ar9565_1p0_Modes_lowest_ob_db_tx_gain_table

#define ar9565_1p1_pciephy_clkreq_disable_L1 ar9565_1p0_pciephy_clkreq_disable_L1

#define ar9565_1p1_modes_fast_clock ar9565_1p0_modes_fast_clock

#define ar9565_1p1_common_wo_xlna_rx_gain_table ar9565_1p0_common_wo_xlna_rx_gain_table

#define ar9565_1p1_modes_low_ob_db_tx_gain_table ar9565_1p0_modes_low_ob_db_tx_gain_table

#define ar9565_1p1_modes_high_ob_db_tx_gain_table ar9565_1p0_modes_high_ob_db_tx_gain_table

#define ar9565_1p1_modes_high_power_tx_gain_table ar9565_1p0_modes_high_power_tx_gain_table

#define ar9565_1p1_baseband_core_txfir_coeff_japan_2484 ar9565_1p0_baseband_core_txfir_coeff_japan_2484

static const u32 ar9565_1p1_radio_postamble[][5] = {
	/* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
	{0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
	{0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
	{0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
	{0x0001610c, 0x40000000, 0x40000000, 0x40000000, 0x40000000},
	{0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
};

#endif /* INITVALS_9565_1P1_H */

Annotation

• Atlas domain: Driver Families / drivers/net.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.