drivers/net/wireless/ath/ath9k/hw.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/ath9k/hw.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/ath9k/hw.c- Extension
.c- Size
- 86990 bytes
- Lines
- 3382
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/export.hlinux/io.hlinux/slab.hlinux/module.hlinux/time.hlinux/bitops.hlinux/etherdevice.hlinux/gpio/consumer.hlinux/unaligned.hhw.hhw-ops.har9003_mac.har9003_mci.har9003_phy.hath9k.h
Detected Declarations
function ath9k_hw_set_clockratefunction ath9k_hw_mac_to_clksfunction ath9k_hw_waitfunction ath9k_hw_synth_delayfunction ath9k_hw_write_arrayfunction ath9k_hw_read_arrayfunction ath9k_hw_reverse_bitsfunction ath9k_hw_computetxtimefunction IS_CHAN_HALF_RATEfunction ath9k_hw_get_channel_centersfunction ath9k_hw_read_revisionsfunction ath9k_hw_disablepciefunction ath9k_hw_chip_testfunction ath9k_hw_init_configfunction ath9k_hw_init_defaultsfunction ath9k_hw_init_macaddrfunction ath9k_hw_post_initfunction ath9k_hw_attach_opsfunction __ath9k_hw_initfunction AR_WAfunction ath9k_hw_initfunction ath9k_hw_init_qosfunction ar9003_get_pll_sqsum_dvcfunction ath9k_hw_init_pllfunction AR_SREV_9561function ath9k_hw_init_interrupt_masksfunction ath9k_hw_set_sifs_timefunction ath9k_hw_setslottimefunction ath9k_hw_set_ack_timeoutfunction ath9k_hw_set_cts_timeoutfunction ath9k_hw_set_global_txtimeoutfunction ath9k_hw_init_global_settingsfunction ath9k_hw_deinitfunction ath9k_regd_get_ctlfunction ath9k_hw_set_dmafunction ath9k_hw_set_operating_modefunction ath9k_hw_get_delta_slope_valsfunction ath9k_hw_ar9330_reset_warfunction ath9k_hw_set_resetfunction ath9k_hw_set_reset_power_onfunction ath9k_hw_set_reset_regfunction ath9k_hw_chip_resetfunction ath9k_hw_channel_changefunction ath9k_hw_apply_gpio_overridefunction ath9k_hw_check_navfunction ath9k_hw_check_alivefunction ath9k_hw_init_mfpfunction ath9k_hw_reset_opmode
Annotated Snippet
if (ah->curchan && IS_CHAN_QUARTER_RATE(ah->curchan)) {
bitsPerSymbol =
((kbps >> 2) * OFDM_SYMBOL_TIME_QUARTER) / 1000;
numBits = OFDM_PLCP_BITS + (frameLen << 3);
numSymbols = DIV_ROUND_UP(numBits, bitsPerSymbol);
txTime = OFDM_SIFS_TIME_QUARTER
+ OFDM_PREAMBLE_TIME_QUARTER
+ (numSymbols * OFDM_SYMBOL_TIME_QUARTER);
} else if (ah->curchan &&
IS_CHAN_HALF_RATE(ah->curchan)) {
bitsPerSymbol =
((kbps >> 1) * OFDM_SYMBOL_TIME_HALF) / 1000;
numBits = OFDM_PLCP_BITS + (frameLen << 3);
numSymbols = DIV_ROUND_UP(numBits, bitsPerSymbol);
txTime = OFDM_SIFS_TIME_HALF +
OFDM_PREAMBLE_TIME_HALF
+ (numSymbols * OFDM_SYMBOL_TIME_HALF);
} else {
bitsPerSymbol = (kbps * OFDM_SYMBOL_TIME) / 1000;
numBits = OFDM_PLCP_BITS + (frameLen << 3);
numSymbols = DIV_ROUND_UP(numBits, bitsPerSymbol);
txTime = OFDM_SIFS_TIME + OFDM_PREAMBLE_TIME
+ (numSymbols * OFDM_SYMBOL_TIME);
}
break;
default:
ath_err(ath9k_hw_common(ah),
"Unknown phy %u (rate ix %u)\n", phy, rateix);
txTime = 0;
break;
}
return txTime;
}
EXPORT_SYMBOL(ath9k_hw_computetxtime);
void ath9k_hw_get_channel_centers(struct ath_hw *ah,
struct ath9k_channel *chan,
struct chan_centers *centers)
{
int8_t extoff;
if (!IS_CHAN_HT40(chan)) {
centers->ctl_center = centers->ext_center =
centers->synth_center = chan->channel;
return;
}
if (IS_CHAN_HT40PLUS(chan)) {
centers->synth_center =
chan->channel + HT40_CHANNEL_CENTER_SHIFT;
extoff = 1;
} else {
centers->synth_center =
chan->channel - HT40_CHANNEL_CENTER_SHIFT;
extoff = -1;
}
centers->ctl_center =
centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT);
/* 25 MHz spacing is supported by hw but not on upper layers */
centers->ext_center =
centers->synth_center + (extoff * HT40_CHANNEL_CENTER_SHIFT);
}
/******************/
/* Chip Revisions */
/******************/
static bool ath9k_hw_read_revisions(struct ath_hw *ah)
{
u32 srev;
u32 val;
if (ah->get_mac_revision)
ah->hw_version.macRev = ah->get_mac_revision();
switch (ah->hw_version.devid) {
case AR5416_AR9100_DEVID:
ah->hw_version.macVersion = AR_SREV_VERSION_9100;
break;
case AR9300_DEVID_AR9330:
ah->hw_version.macVersion = AR_SREV_VERSION_9330;
if (!ah->get_mac_revision) {
val = REG_READ(ah, AR_SREV(ah));
ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
}
return true;
case AR9300_DEVID_AR9340:
ah->hw_version.macVersion = AR_SREV_VERSION_9340;
Annotation
- Immediate include surface: `linux/export.h`, `linux/io.h`, `linux/slab.h`, `linux/module.h`, `linux/time.h`, `linux/bitops.h`, `linux/etherdevice.h`, `linux/gpio/consumer.h`.
- Detected declarations: `function ath9k_hw_set_clockrate`, `function ath9k_hw_mac_to_clks`, `function ath9k_hw_wait`, `function ath9k_hw_synth_delay`, `function ath9k_hw_write_array`, `function ath9k_hw_read_array`, `function ath9k_hw_reverse_bits`, `function ath9k_hw_computetxtime`, `function IS_CHAN_HALF_RATE`, `function ath9k_hw_get_channel_centers`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.