drivers/net/wireless/ath/wcn36xx/smd.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/wcn36xx/smd.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/wcn36xx/smd.c- Extension
.c- Size
- 97449 bytes
- Lines
- 3432
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/etherdevice.hlinux/firmware.hlinux/bitops.hlinux/rpmsg.hsmd.hfirmware.h
Detected Declarations
struct wcn36xx_cfg_valfunction put_cfg_tlv_u32function wcn36xx_smd_set_bss_nw_typefunction is_cap_supportedfunction wcn36xx_smd_set_bss_ht_paramsfunction wcn36xx_smd_set_bss_vht_paramsfunction wcn36xx_smd_set_sta_ht_paramsfunction wcn36xx_smd_set_sta_vht_paramsfunction wcn36xx_smd_set_sta_ht_ldpc_paramsfunction wcn36xx_smd_set_sta_default_ht_paramsfunction wcn36xx_smd_set_sta_default_vht_paramsfunction wcn36xx_smd_set_sta_default_ht_ldpc_paramsfunction wcn36xx_smd_set_sta_paramsfunction wcn36xx_smd_send_and_waitfunction msecs_to_jiffiesfunction wcn36xx_smd_rsp_status_checkfunction wcn36xx_smd_load_nvfunction wcn36xx_smd_start_rspfunction wcn36xx_smd_startfunction wcn36xx_smd_stopfunction wcn36xx_smd_init_scanfunction wcn36xx_smd_start_scanfunction wcn36xx_smd_end_scanfunction wcn36xx_smd_finish_scanfunction wcn36xx_smd_start_hw_scanfunction wcn36xx_smd_stop_hw_scanfunction wcn36xx_smd_update_channel_listfunction wcn36xx_smd_switch_channel_rspfunction wcn36xx_smd_switch_channelfunction wcn36xx_smd_process_ptt_msg_rspfunction wcn36xx_smd_process_ptt_msgfunction wcn36xx_smd_add_sta_self_rspfunction wcn36xx_smd_add_sta_selffunction wcn36xx_smd_delete_sta_selffunction wcn36xx_smd_delete_stafunction wcn36xx_smd_join_rspfunction wcn36xx_smd_joinfunction wcn36xx_smd_set_link_stfunction wcn36xx_smd_convert_sta_to_v1function wcn36xx_smd_set_sta_params_v1function wcn36xx_smd_config_sta_rspfunction wcn36xx_smd_config_sta_v1function wcn36xx_smd_config_sta_v0function wcn36xx_smd_config_stafunction wcn36xx_smd_set_bss_paramsfunction wcn36xx_smd_config_bss_v1function wcn36xx_smd_config_bss_v0function wcn36xx_smd_config_bss_rsp
Annotated Snippet
struct wcn36xx_cfg_val {
u32 cfg_id;
u32 value;
};
#define WCN36XX_CFG_VAL(id, val) \
{ \
.cfg_id = WCN36XX_HAL_CFG_ ## id, \
.value = val \
}
static struct wcn36xx_cfg_val wcn36xx_cfg_vals[] = {
WCN36XX_CFG_VAL(CURRENT_TX_ANTENNA, 1),
WCN36XX_CFG_VAL(CURRENT_RX_ANTENNA, 1),
WCN36XX_CFG_VAL(LOW_GAIN_OVERRIDE, 0),
WCN36XX_CFG_VAL(POWER_STATE_PER_CHAIN, 785),
WCN36XX_CFG_VAL(CAL_PERIOD, 5),
WCN36XX_CFG_VAL(CAL_CONTROL, 1),
WCN36XX_CFG_VAL(PROXIMITY, 0),
WCN36XX_CFG_VAL(NETWORK_DENSITY, 3),
WCN36XX_CFG_VAL(MAX_MEDIUM_TIME, 6000),
WCN36XX_CFG_VAL(MAX_MPDUS_IN_AMPDU, 64),
WCN36XX_CFG_VAL(RTS_THRESHOLD, 2347),
WCN36XX_CFG_VAL(SHORT_RETRY_LIMIT, 15),
WCN36XX_CFG_VAL(LONG_RETRY_LIMIT, 15),
WCN36XX_CFG_VAL(FRAGMENTATION_THRESHOLD, 8000),
WCN36XX_CFG_VAL(DYNAMIC_THRESHOLD_ZERO, 5),
WCN36XX_CFG_VAL(DYNAMIC_THRESHOLD_ONE, 10),
WCN36XX_CFG_VAL(DYNAMIC_THRESHOLD_TWO, 15),
WCN36XX_CFG_VAL(FIXED_RATE, 0),
WCN36XX_CFG_VAL(RETRYRATE_POLICY, 4),
WCN36XX_CFG_VAL(RETRYRATE_SECONDARY, 0),
WCN36XX_CFG_VAL(RETRYRATE_TERTIARY, 0),
WCN36XX_CFG_VAL(FORCE_POLICY_PROTECTION, 5),
WCN36XX_CFG_VAL(FIXED_RATE_MULTICAST_24GHZ, 1),
WCN36XX_CFG_VAL(FIXED_RATE_MULTICAST_5GHZ, 5),
WCN36XX_CFG_VAL(DEFAULT_RATE_INDEX_5GHZ, 5),
WCN36XX_CFG_VAL(MAX_BA_SESSIONS, 40),
WCN36XX_CFG_VAL(PS_DATA_INACTIVITY_TIMEOUT, 200),
WCN36XX_CFG_VAL(PS_ENABLE_BCN_FILTER, 1),
WCN36XX_CFG_VAL(PS_ENABLE_RSSI_MONITOR, 1),
WCN36XX_CFG_VAL(NUM_BEACON_PER_RSSI_AVERAGE, 20),
WCN36XX_CFG_VAL(STATS_PERIOD, 10),
WCN36XX_CFG_VAL(CFP_MAX_DURATION, 30000),
WCN36XX_CFG_VAL(FRAME_TRANS_ENABLED, 0),
WCN36XX_CFG_VAL(BA_THRESHOLD_HIGH, 128),
WCN36XX_CFG_VAL(MAX_BA_BUFFERS, 2560),
WCN36XX_CFG_VAL(DYNAMIC_PS_POLL_VALUE, 0),
WCN36XX_CFG_VAL(TX_PWR_CTRL_ENABLE, 1),
WCN36XX_CFG_VAL(ENABLE_CLOSE_LOOP, 1),
WCN36XX_CFG_VAL(ENABLE_LPWR_IMG_TRANSITION, 0),
WCN36XX_CFG_VAL(BTC_STATIC_LEN_LE_BT, 120000),
WCN36XX_CFG_VAL(BTC_STATIC_LEN_LE_WLAN, 30000),
WCN36XX_CFG_VAL(MAX_ASSOC_LIMIT, 10),
WCN36XX_CFG_VAL(ENABLE_MCC_ADAPTIVE_SCHEDULER, 0),
WCN36XX_CFG_VAL(ENABLE_DYNAMIC_RA_START_RATE, 133), /* MCS 5 */
WCN36XX_CFG_VAL(LINK_FAIL_TX_CNT, 1000),
};
static struct wcn36xx_cfg_val wcn3680_cfg_vals[] = {
WCN36XX_CFG_VAL(CURRENT_TX_ANTENNA, 1),
WCN36XX_CFG_VAL(CURRENT_RX_ANTENNA, 1),
WCN36XX_CFG_VAL(LOW_GAIN_OVERRIDE, 0),
WCN36XX_CFG_VAL(POWER_STATE_PER_CHAIN, 785),
WCN36XX_CFG_VAL(CAL_PERIOD, 5),
WCN36XX_CFG_VAL(CAL_CONTROL, 1),
WCN36XX_CFG_VAL(PROXIMITY, 0),
WCN36XX_CFG_VAL(NETWORK_DENSITY, 3),
WCN36XX_CFG_VAL(MAX_MEDIUM_TIME, 4096),
WCN36XX_CFG_VAL(MAX_MPDUS_IN_AMPDU, 64),
WCN36XX_CFG_VAL(RTS_THRESHOLD, 2347),
WCN36XX_CFG_VAL(SHORT_RETRY_LIMIT, 15),
WCN36XX_CFG_VAL(LONG_RETRY_LIMIT, 15),
WCN36XX_CFG_VAL(FRAGMENTATION_THRESHOLD, 8000),
WCN36XX_CFG_VAL(DYNAMIC_THRESHOLD_ZERO, 5),
WCN36XX_CFG_VAL(DYNAMIC_THRESHOLD_ONE, 10),
WCN36XX_CFG_VAL(DYNAMIC_THRESHOLD_TWO, 15),
WCN36XX_CFG_VAL(FIXED_RATE, 0),
WCN36XX_CFG_VAL(RETRYRATE_POLICY, 4),
WCN36XX_CFG_VAL(RETRYRATE_SECONDARY, 0),
WCN36XX_CFG_VAL(RETRYRATE_TERTIARY, 0),
WCN36XX_CFG_VAL(FORCE_POLICY_PROTECTION, 5),
WCN36XX_CFG_VAL(FIXED_RATE_MULTICAST_24GHZ, 1),
WCN36XX_CFG_VAL(FIXED_RATE_MULTICAST_5GHZ, 5),
WCN36XX_CFG_VAL(DEFAULT_RATE_INDEX_24GHZ, 1),
WCN36XX_CFG_VAL(DEFAULT_RATE_INDEX_5GHZ, 5),
WCN36XX_CFG_VAL(MAX_BA_SESSIONS, 40),
WCN36XX_CFG_VAL(PS_DATA_INACTIVITY_TIMEOUT, 200),
WCN36XX_CFG_VAL(PS_ENABLE_BCN_FILTER, 1),
WCN36XX_CFG_VAL(PS_ENABLE_RSSI_MONITOR, 1),
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/etherdevice.h`, `linux/firmware.h`, `linux/bitops.h`, `linux/rpmsg.h`, `smd.h`, `firmware.h`.
- Detected declarations: `struct wcn36xx_cfg_val`, `function put_cfg_tlv_u32`, `function wcn36xx_smd_set_bss_nw_type`, `function is_cap_supported`, `function wcn36xx_smd_set_bss_ht_params`, `function wcn36xx_smd_set_bss_vht_params`, `function wcn36xx_smd_set_sta_ht_params`, `function wcn36xx_smd_set_sta_vht_params`, `function wcn36xx_smd_set_sta_ht_ldpc_params`, `function wcn36xx_smd_set_sta_default_ht_params`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.