drivers/net/wireless/ath/wcn36xx/txrx.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/ath/wcn36xx/txrx.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/ath/wcn36xx/txrx.c- Extension
.c- Size
- 23772 bytes
- Lines
- 735
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/random.htxrx.h
Detected Declarations
struct wcn36xx_ratefunction Copyrightfunction get_snrfunction __skb_queue_purge_irqfunction wcn36xx_update_surveyfunction wcn36xx_rx_skbfunction wcn36xx_set_tx_pdufunction wcn36xx_tx_start_ampdufunction wcn36xx_set_tx_datafunction wcn36xx_set_tx_mgmtfunction wcn36xx_start_txfunction wcn36xx_process_tx_rate
Annotated Snippet
struct wcn36xx_rate {
u16 bitrate;
u16 mcs_or_legacy_index;
enum mac80211_rx_encoding encoding;
enum mac80211_rx_encoding_flags encoding_flags;
enum rate_info_bw bw;
};
/* Buffer descriptor rx_ch field is limited to 5-bit (4+1), a mapping is used
* for 11A Channels.
*/
static const u8 ab_rx_ch_map[] = { 36, 40, 44, 48, 52, 56, 60, 64, 100, 104,
108, 112, 116, 120, 124, 128, 132, 136, 140,
149, 153, 157, 161, 165, 144 };
static const struct wcn36xx_rate wcn36xx_rate_table[] = {
/* 11b rates */
{ 10, 0, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 20, 1, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 110, 3, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
/* 11b SP (short preamble) */
{ 10, 0, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
{ 20, 1, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
{ 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
{ 110, 3, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
/* 11ag */
{ 60, 4, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 90, 5, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 120, 6, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 180, 7, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 240, 8, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 360, 9, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 480, 10, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
{ 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
/* 11n */
{ 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
{ 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
{ 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
{ 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
{ 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
{ 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
{ 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
{ 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
/* 11n SGI */
{ 72, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
{ 144, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
{ 217, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
{ 289, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
{ 434, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
{ 578, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
{ 650, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
{ 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
/* 11n GF (greenfield) */
{ 65, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
{ 130, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
{ 195, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
{ 260, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
{ 390, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
{ 520, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
{ 585, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
{ 650, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
/* 11n CB (channel bonding) */
{ 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
{ 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
{ 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
{ 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
{ 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
{ 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
{ 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
{ 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
/* 11n CB + SGI */
{ 150, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
{ 300, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
{ 450, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
{ 600, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
{ 900, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
{ 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
{ 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
{ 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
/* 11n GF + CB */
{ 135, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
Annotation
- Immediate include surface: `linux/random.h`, `txrx.h`.
- Detected declarations: `struct wcn36xx_rate`, `function Copyright`, `function get_snr`, `function __skb_queue_purge_irq`, `function wcn36xx_update_survey`, `function wcn36xx_rx_skb`, `function wcn36xx_set_tx_pdu`, `function wcn36xx_tx_start_ampdu`, `function wcn36xx_set_tx_data`, `function wcn36xx_set_tx_mgmt`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.