drivers/net/wireless/broadcom/brcm80211/brcmsmac/d11.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/broadcom/brcm80211/brcmsmac/d11.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/broadcom/brcm80211/brcmsmac/d11.h
Extension
.h
Size
56963 bytes
Lines
1903
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct intctrlregs {
	u32 intstatus;
	u32 intmask;
};

/* PIO structure,
 *  support two PIO format: 2 bytes access and 4 bytes access
 *  basic FIFO register set is per channel(transmit or receive)
 *  a pair of channels is defined for convenience
 */
/* 2byte-wide pio register set per channel(xmt or rcv) */
struct pio2regs {
	u16 fifocontrol;
	u16 fifodata;
	u16 fifofree;	/* only valid in xmt channel, not in rcv channel */
	u16 PAD;
};

/* a pair of pio channels(tx and rx) */
struct pio2regp {
	struct pio2regs tx;
	struct pio2regs rx;
};

/* 4byte-wide pio register set per channel(xmt or rcv) */
struct pio4regs {
	u32 fifocontrol;
	u32 fifodata;
};

/* a pair of pio channels(tx and rx) */
struct pio4regp {
	struct pio4regs tx;
	struct pio4regs rx;
};

/* read: 32-bit register that can be read as 32-bit or as 2 16-bit
 * write: only low 16b-it half can be written
 */
union pmqreg {
	u32 pmqhostdata;	/* read only! */
	struct {
		u16 pmqctrlstatus;	/* read/write */
		u16 PAD;
	} w;
};

struct fifo64 {
	struct dma64regs dmaxmt;	/* dma tx */
	struct pio4regs piotx;	/* pio tx */
	struct dma64regs dmarcv;	/* dma rx */
	struct pio4regs piorx;	/* pio rx */
};

/*
 * Host Interface Registers
 */
struct d11regs {
	/* Device Control ("semi-standard host registers") */
	u32 PAD[3];		/* 0x0 - 0x8 */
	u32 biststatus;	/* 0xC */
	u32 biststatus2;	/* 0x10 */
	u32 PAD;		/* 0x14 */
	u32 gptimer;		/* 0x18 */
	u32 usectimer;	/* 0x1c *//* for corerev >= 26 */

	/* Interrupt Control *//* 0x20 */
	struct intctrlregs intctrlregs[8];

	u32 PAD[40];		/* 0x60 - 0xFC */

	u32 intrcvlazy[4];	/* 0x100 - 0x10C */

	u32 PAD[4];		/* 0x110 - 0x11c */

	u32 maccontrol;	/* 0x120 */
	u32 maccommand;	/* 0x124 */
	u32 macintstatus;	/* 0x128 */
	u32 macintmask;	/* 0x12C */

	/* Transmit Template Access */
	u32 tplatewrptr;	/* 0x130 */
	u32 tplatewrdata;	/* 0x134 */
	u32 PAD[2];		/* 0x138 - 0x13C */

	/* PMQ registers */
	union pmqreg pmqreg;	/* 0x140 */
	u32 pmqpatl;		/* 0x144 */
	u32 pmqpath;		/* 0x148 */
	u32 PAD;		/* 0x14C */

Annotation

Implementation Notes