drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phyreg_n.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phyreg_n.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phyreg_n.h
Extension
.h
Size
5122 bytes
Lines
157
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: ISC
/*
 * Copyright (c) 2010 Broadcom Corporation
 */

#define NPHY_TBL_ID_GAIN1		0
#define NPHY_TBL_ID_GAIN2		1
#define NPHY_TBL_ID_GAINBITS1		2
#define NPHY_TBL_ID_GAINBITS2		3
#define NPHY_TBL_ID_GAINLIMIT		4
#define NPHY_TBL_ID_WRSSIGainLimit	5
#define NPHY_TBL_ID_RFSEQ		7
#define NPHY_TBL_ID_AFECTRL		8
#define NPHY_TBL_ID_ANTSWCTRLLUT	9
#define NPHY_TBL_ID_IQLOCAL		15
#define NPHY_TBL_ID_NOISEVAR		16
#define NPHY_TBL_ID_SAMPLEPLAY		17
#define NPHY_TBL_ID_CORE1TXPWRCTL	26
#define NPHY_TBL_ID_CORE2TXPWRCTL	27
#define NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL	30

#define NPHY_TBL_ID_EPSILONTBL0   31
#define NPHY_TBL_ID_SCALARTBL0    32
#define NPHY_TBL_ID_EPSILONTBL1   33
#define NPHY_TBL_ID_SCALARTBL1    34

#define	NPHY_TO_BPHY_OFF	0xc00

#define NPHY_BandControl_currentBand			0x0001
#define RFCC_CHIP0_PU			0x0400
#define RFCC_POR_FORCE			0x0040
#define RFCC_OE_POR_FORCE		0x0080
#define NPHY_RfctrlIntc_override_OFF			0
#define NPHY_RfctrlIntc_override_TRSW			1
#define NPHY_RfctrlIntc_override_PA				2
#define NPHY_RfctrlIntc_override_EXT_LNA_PU		3
#define NPHY_RfctrlIntc_override_EXT_LNA_GAIN	4
#define RIFS_ENABLE			0x80
#define BPHY_BAND_SEL_UP20		0x10
#define NPHY_MLenable			0x02

#define NPHY_RfseqMode_CoreActv_override 0x0001
#define NPHY_RfseqMode_Trigger_override	0x0002
#define NPHY_RfseqCoreActv_TxRxChain0	(0x11)
#define NPHY_RfseqCoreActv_TxRxChain1	(0x22)

#define NPHY_RfseqTrigger_rx2tx		0x0001
#define NPHY_RfseqTrigger_tx2rx		0x0002
#define NPHY_RfseqTrigger_updategainh	0x0004
#define NPHY_RfseqTrigger_updategainl	0x0008
#define NPHY_RfseqTrigger_updategainu	0x0010
#define NPHY_RfseqTrigger_reset2rx	0x0020
#define NPHY_RfseqStatus_rx2tx		0x0001
#define NPHY_RfseqStatus_tx2rx		0x0002
#define NPHY_RfseqStatus_updategainh	0x0004
#define NPHY_RfseqStatus_updategainl	0x0008
#define NPHY_RfseqStatus_updategainu	0x0010
#define NPHY_RfseqStatus_reset2rx	0x0020
#define NPHY_ClassifierCtrl_cck_en	0x1
#define NPHY_ClassifierCtrl_ofdm_en	0x2
#define NPHY_ClassifierCtrl_waited_en	0x4
#define NPHY_IQFlip_ADC1		0x0001
#define NPHY_IQFlip_ADC2		0x0010
#define NPHY_sampleCmd_STOP		0x0002

#define RX_GF_OR_MM			0x0004
#define RX_GF_MM_AUTO			0x0100

#define NPHY_iqloCalCmdGctl_IQLO_CAL_EN	0x8000

#define NPHY_IqestCmd_iqstart		0x1
#define NPHY_IqestCmd_iqMode		0x2

#define NPHY_TxPwrCtrlCmd_pwrIndex_init		0x40
#define NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7	0x19

#define PRIM_SEL_UP20		0x8000

#define NPHY_RFSEQ_RX2TX		0x0
#define NPHY_RFSEQ_TX2RX		0x1
#define NPHY_RFSEQ_RESET2RX		0x2
#define NPHY_RFSEQ_UPDATEGAINH		0x3
#define NPHY_RFSEQ_UPDATEGAINL		0x4
#define NPHY_RFSEQ_UPDATEGAINU		0x5

#define NPHY_RFSEQ_CMD_NOP		0x0
#define NPHY_RFSEQ_CMD_RXG_FBW		0x1
#define NPHY_RFSEQ_CMD_TR_SWITCH	0x2
#define NPHY_RFSEQ_CMD_EXT_PA		0x3
#define NPHY_RFSEQ_CMD_RXPD_TXPD	0x4

Annotation

Implementation Notes