drivers/net/wireless/intel/iwlwifi/fw/api/rx.h
Source file repositories/reference/linux-study-clean/drivers/net/wireless/intel/iwlwifi/fw/api/rx.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/intel/iwlwifi/fw/api/rx.h- Extension
.h- Size
- 46864 bytes
- Lines
- 1436
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
struct iwl_rx_phy_infostruct iwl_rx_mpdu_res_startstruct iwl_rx_mpdu_desc_v1struct iwl_rx_mpdu_desc_v3struct iwl_rx_mpdu_descstruct iwl_rx_no_datastruct iwl_rx_no_data_ver_3struct iwl_frame_releasestruct iwl_bar_frame_releasestruct iwl_rss_config_cmdstruct iwl_rxq_sync_cmdstruct iwl_rxq_sync_notificationstruct iwl_mvm_pm_state_notificationstruct iwl_ba_window_status_notifstruct iwl_rfh_queue_datastruct iwl_rfh_queue_configstruct iwl_beacon_filter_notif_v1struct iwl_beacon_filter_notifstruct iwl_ht_sigsstruct iwl_vht_sigsstruct iwl_he_sigsstruct iwl_he_tb_sigsstruct iwl_eht_sigsstruct iwl_eht_tb_sigsstruct iwl_uhr_sigsstruct iwl_uhr_tb_sigsstruct iwl_uhr_elr_sigsstruct iwl_rx_phy_air_sniffer_ntfyenum iwl_mac_context_infoenum iwl_csum_rx_assist_infoenum iwl_rx_phy_flagsenum iwl_mvm_rx_statusenum iwl_rx_mpdu_mac_flags1enum iwl_rx_mpdu_mac_flags2enum iwl_rx_mpdu_amsdu_infoenum iwl_rx_mpdu_mac_phy_bandenum iwl_rx_l3_proto_valuesenum iwl_rx_l3l4_flagsenum iwl_rx_mpdu_statusenum iwl_rx_mpdu_reorder_dataenum iwl_rx_mpdu_phy_infoenum iwl_rx_mpdu_mac_infoenum iwl_rx_phy_he_data0enum iwl_rx_phy_eht_data0enum iwl_rx_phy_info_typeenum iwl_rx_phy_common_data1enum iwl_rx_phy_he_data1enum iwl_rx_phy_eht_data1
Annotated Snippet
struct iwl_rx_phy_info {
u8 non_cfg_phy_cnt;
u8 cfg_phy_cnt;
u8 stat_id;
u8 reserved1;
__le32 system_timestamp;
__le64 timestamp;
__le32 beacon_time_stamp;
__le16 phy_flags;
__le16 channel;
__le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
__le32 rate_n_flags;
__le32 byte_count;
u8 mac_active_msk;
u8 mac_context_info;
__le16 frame_time;
} __packed;
/*
* TCP offload Rx assist info
*
* bits 0:3 - reserved
* bits 4:7 - MIC CRC length
* bits 8:12 - MAC header length
* bit 13 - Padding indication
* bit 14 - A-AMSDU indication
* bit 15 - Offload enabled
*/
enum iwl_csum_rx_assist_info {
CSUM_RXA_RESERVED_MASK = 0x000f,
CSUM_RXA_MICSIZE_MASK = 0x00f0,
CSUM_RXA_HEADERLEN_MASK = 0x1f00,
CSUM_RXA_PADD = BIT(13),
CSUM_RXA_AMSDU = BIT(14),
CSUM_RXA_ENA = BIT(15)
};
/**
* struct iwl_rx_mpdu_res_start - phy info
* @byte_count: byte count of the frame
* @assist: see &enum iwl_csum_rx_assist_info
*/
struct iwl_rx_mpdu_res_start {
__le16 byte_count;
__le16 assist;
} __packed; /* _RX_MPDU_RES_START_API_S_VER_2 */
/**
* enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
* @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
* @RX_RES_PHY_FLAGS_MOD_CCK: modulation is CCK
* @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
* @RX_RES_PHY_FLAGS_NARROW_BAND: narrow band (<20 MHz) receive
* @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
* @RX_RES_PHY_FLAGS_ANTENNA_POS: antenna bit position
* @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
* @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
* @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
* @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
*/
enum iwl_rx_phy_flags {
RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
RX_RES_PHY_FLAGS_AGG = BIT(7),
RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
};
/**
* enum iwl_mvm_rx_status - written by fw for each Rx packet
* @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
* @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
* @RX_MPDU_RES_STATUS_SRC_STA_FOUND: station was found
* @RX_MPDU_RES_STATUS_KEY_VALID: key was valid
* @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
* @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
* in the driver.
* @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
* @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
* alg = CCM only. Checks replay attack for 11w frames.
* @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
* @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
* @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
* @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
* @RX_MPDU_RES_STATUS_SEC_EXT_ENC: this frame is encrypted using extension
Annotation
- Detected declarations: `struct iwl_rx_phy_info`, `struct iwl_rx_mpdu_res_start`, `struct iwl_rx_mpdu_desc_v1`, `struct iwl_rx_mpdu_desc_v3`, `struct iwl_rx_mpdu_desc`, `struct iwl_rx_no_data`, `struct iwl_rx_no_data_ver_3`, `struct iwl_frame_release`, `struct iwl_bar_frame_release`, `struct iwl_rss_config_cmd`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.