drivers/net/wireless/intel/iwlwifi/iwl-config.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/intel/iwlwifi/iwl-config.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/intel/iwlwifi/iwl-config.h
Extension
.h
Size
25736 bytes
Lines
758
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct iwl_fw_mon_reg {
	u32 addr;
	u32 mask;
};

/**
 * struct iwl_fw_mon_regs - FW monitor registers
 * @write_ptr: write pointer register
 * @cycle_cnt: cycle count register
 * @cur_frag: current fragment in use
 */
struct iwl_fw_mon_regs {
	struct iwl_fw_mon_reg write_ptr;
	struct iwl_fw_mon_reg cycle_cnt;
	struct iwl_fw_mon_reg cur_frag;
};

/**
 * struct iwl_family_base_params - base parameters for an entire family
 * @max_ll_items: max number of OTP blocks
 * @shadow_ram_support: shadow support for OTP memory
 * @led_compensation: compensate on the led on/off time per HW according
 *	to the deviation to achieve the desired led frequency.
 *	The detail algorithm is described in iwl-led.c
 * @wd_timeout: TX queues watchdog timeout
 * @max_event_log_size: size of event log buffer size for ucode event logging
 * @shadow_reg_enable: HW shadow register support
 * @apmg_not_supported: there's no APMG
 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
 *	is in flight. This is due to a HW bug in 7260, 3160 and 7265.
 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
 * @max_tfd_queue_size: max number of entries in tfd queue.
 * @eeprom_size: EEPROM size
 * @num_of_queues: number of HW TX queues supported
 * @pcie_l1_allowed: PCIe L1 state is allowed
 * @pll_cfg: PLL configuration needed
 * @nvm_hw_section_num: the ID of the HW NVM section
 * @features: hw features, any combination of feature_passlist
 * @smem_offset: offset from which the SMEM begins
 * @smem_len: the length of SMEM
 * @mac_addr_from_csr: read HW address from CSR registers at this offset
 * @d3_debug_data_base_addr: base address where D3 debug data is stored
 * @d3_debug_data_length: length of the D3 debug data
 * @min_ba_txq_size: minimum number of slots required in a TX queue used
 *	for aggregation
 * @min_txq_size: minimum number of slots required in a TX queue
 * @gp2_reg_addr: GP2 (timer) register address
 * @mon_dbgi_regs: monitor DBGI registers
 * @mon_dram_regs: monitor DRAM registers
 * @mon_smem_regs: monitor SMEM registers
 * @ucode_api_max: Highest version of uCode API supported by driver.
 * @ucode_api_min: Lowest version of uCode API supported by driver.
 */
struct iwl_family_base_params {
	unsigned int wd_timeout;

	u16 eeprom_size;
	u16 max_event_log_size;

	u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
	   shadow_ram_support:1,
	   shadow_reg_enable:1,
	   pcie_l1_allowed:1,
	   apmg_wake_up_wa:1,
	   apmg_not_supported:1,
	   scd_chain_ext_wa:1;

	u16 num_of_queues;	/* def: HW dependent */
	u32 max_tfd_queue_size;	/* def: HW dependent */

	u8 max_ll_items;
	u8 led_compensation;
	u16 ucode_api_max;
	u16 ucode_api_min;
	u32 mac_addr_from_csr:10;
	u8 nvm_hw_section_num;
	netdev_features_t features;
	u32 smem_offset;
	u32 smem_len;
	u32 d3_debug_data_base_addr;
	u32 d3_debug_data_length;
	u32 min_txq_size;
	u32 gp2_reg_addr;
	u32 min_ba_txq_size;
	const struct iwl_fw_mon_regs mon_dram_regs;
	const struct iwl_fw_mon_regs mon_smem_regs;
	const struct iwl_fw_mon_regs mon_dbgi_regs;
};

/*

Annotation

Implementation Notes