drivers/net/wireless/intel/iwlwifi/iwl-fh.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/intel/iwlwifi/iwl-fh.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/intel/iwlwifi/iwl-fh.h
Extension
.h
Size
28847 bytes
Lines
736
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct iwl_rb_status {
	__le16 closed_rb_num;
	__le16 closed_fr_num;
	__le16 finished_rb_num;
	__le16 finished_fr_num;
	__le32 __spare;
} __packed;


#define TFD_QUEUE_SIZE_MAX      (256)
/* cb size is the exponent - 3 */
#define TFD_QUEUE_CB_SIZE(x)	(ilog2(x) - 3)
#define TFD_QUEUE_SIZE_BC_DUP	(64)
#define TFD_QUEUE_BC_SIZE	(TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP)
#define TFD_QUEUE_BC_SIZE_AX210	1024
#define TFD_QUEUE_BC_SIZE_BZ	(1024 * 4)
#define IWL_TX_DMA_MASK        DMA_BIT_MASK(36)
#define IWL_NUM_OF_TBS		20
#define IWL_TFH_NUM_TBS		25

/* IMR DMA registers */
#define IMR_TFH_SRV_DMA_CHNL0_CTRL           0x00a0a51c
#define IMR_TFH_SRV_DMA_CHNL0_SRAM_ADDR      0x00a0a520
#define IMR_TFH_SRV_DMA_CHNL0_DRAM_ADDR_LSB  0x00a0a524
#define IMR_TFH_SRV_DMA_CHNL0_DRAM_ADDR_MSB  0x00a0a528
#define IMR_TFH_SRV_DMA_CHNL0_BC             0x00a0a52c
#define TFH_SRV_DMA_CHNL0_LEFT_BC	     0x00a0a530

/* RFH S2D DMA registers */
#define IMR_RFH_GEN_CFG_SERVICE_DMA_RS_MSK	0x0000000c
#define IMR_RFH_GEN_CFG_SERVICE_DMA_SNOOP_MSK	0x00000002

/* TFH D2S DMA registers */
#define IMR_UREG_CHICK_HALT_UMAC_PERMANENTLY_MSK	0x80000000
#define IMR_UREG_CHICK					0x00d05c00
#define IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_IRQ_TARGET_POS	0x00800000
#define IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_RS_MSK		0x00000030
#define IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_DMA_EN_POS	0x80000000

static inline u8 iwl_get_dma_hi_addr(dma_addr_t addr)
{
	return (sizeof(addr) > sizeof(u32) ? upper_32_bits(addr) : 0) & 0xF;
}

/**
 * enum iwl_tfd_tb_hi_n_len - TB hi_n_len bits
 * @TB_HI_N_LEN_ADDR_HI_MSK: high 4 bits (to make it 36) of DMA address
 * @TB_HI_N_LEN_LEN_MSK: length of the TB
 */
enum iwl_tfd_tb_hi_n_len {
	TB_HI_N_LEN_ADDR_HI_MSK	= 0xf,
	TB_HI_N_LEN_LEN_MSK	= 0xfff0,
};

/**
 * struct iwl_tfd_tb - transmit buffer descriptor within transmit frame descriptor
 *
 * This structure contains dma address and length of transmission address
 *
 * @lo: low [31:0] portion of the dma address of TX buffer
 * 	every even is unaligned on 16 bit boundary
 * @hi_n_len: &enum iwl_tfd_tb_hi_n_len
 */
struct iwl_tfd_tb {
	__le32 lo;
	__le16 hi_n_len;
} __packed;

/**
 * struct iwl_tfh_tb - transmit buffer descriptor within transmit frame descriptor
 *
 * This structure contains dma address and length of transmission address
 *
 * @tb_len: length of the tx buffer
 * @addr: 64 bits dma address
 */
struct iwl_tfh_tb {
	__le16 tb_len;
	__le64 addr;
} __packed;

/*
 * Each Tx queue uses a circular buffer of 256 TFDs stored in host DRAM.
 * Both driver and device share these circular buffers, each of which must be
 * contiguous 256 TFDs.
 * For pre 22000 HW it is 256 x 128 bytes-per-TFD = 32 KBytes
 * For 22000 HW and on it is 256 x 256 bytes-per-TFD = 65 KBytes
 *
 * Driver must indicate the physical address of the base of each
 * circular buffer via the FH_MEM_CBBC_QUEUE registers.

Annotation

Implementation Notes