drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/internal.h
Source file repositories/reference/linux-study-clean/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/internal.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/internal.h- Extension
.h- Size
- 41347 bytes
- Lines
- 1276
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/spinlock.hlinux/interrupt.hlinux/skbuff.hlinux/wait.hlinux/pci.hlinux/timer.hlinux/cpu.hiwl-fh.hiwl-csr.hiwl-trans.hiwl-debug.hiwl-io.hiwl-op-mode.hiwl-drv.hpcie/iwl-context-info.h
Detected Declarations
struct iwl_host_cmdstruct iwl_rx_mem_bufferstruct isr_statisticsstruct iwl_rx_transfer_descstruct iwl_rx_completion_descstruct iwl_rx_completion_desc_bzstruct iwl_rxqstruct iwl_rb_allocatorstruct cont_recstruct iwl_pcie_txq_entrystruct iwl_pcie_first_tb_bufstruct iwl_txqstruct iwl_pcie_txqsstruct iwl_trans_pciestruct iwl_tso_hdr_pagestruct iwl_tso_page_infoenum iwl_fw_mon_dbgfs_stateenum iwl_shared_irq_flagsenum iwl_image_response_codeenum iwl_pcie_fw_reset_stateenum iwl_pcie_imr_statusfunction iwl_get_closed_rb_sttsfunction IWL_TRANS_GET_PCIE_TRANSfunction iwl_pcie_clear_irqfunction iwl_trans_pcie_get_transfunction iwl_pcie_get_tso_page_physfunction iwl_txq_get_first_tb_dmafunction iwl_txq_get_cmd_indexfunction iwl_txq_crosses_4g_boundaryfunction iwl_txq_stopfunction iwl_txq_inc_wrapfunction iwl_txq_dec_wrapfunction iwl_trans_pcie_wake_queuefunction iwl_txq_set_tfd_invalid_gen2function iwl_txq_gen1_tfd_tb_get_lenfunction iwl_pcie_gen1_2_alloc_tx_cmdfunction iwl_pcie_gen1_2_free_tx_cmdfunction _iwl_disable_interruptsfunction iwl_pcie_get_num_sectionsfunction iwl_pcie_ctxt_info_free_fw_imgfunction iwl_disable_interruptsfunction _iwl_enable_interruptsfunction iwl_enable_interruptsfunction iwl_enable_hw_int_msk_msixfunction iwl_enable_fh_int_msk_msixfunction iwl_enable_fw_load_intfunction iwl_enable_fw_load_int_ctx_infofunction iwl_enable_rfkill_int
Annotated Snippet
struct iwl_rx_mem_buffer {
dma_addr_t page_dma;
struct page *page;
struct list_head list;
u32 offset;
u16 vid;
bool invalid;
};
/* interrupt statistics */
struct isr_statistics {
u32 hw;
u32 sw;
u32 err_code;
u32 sch;
u32 alive;
u32 rfkill;
u32 ctkill;
u32 wakeup;
u32 rx;
u32 tx;
u32 unhandled;
};
/**
* struct iwl_rx_transfer_desc - transfer descriptor
* @addr: ptr to free buffer start address
* @rbid: unique tag of the buffer
* @reserved: reserved
*/
struct iwl_rx_transfer_desc {
__le16 rbid;
__le16 reserved[3];
__le64 addr;
} __packed;
#define IWL_RX_CD_FLAGS_FRAGMENTED BIT(0)
/**
* struct iwl_rx_completion_desc - completion descriptor
* @reserved1: reserved
* @rbid: unique tag of the received buffer
* @flags: flags (0: fragmented, all others: reserved)
* @reserved2: reserved
*/
struct iwl_rx_completion_desc {
__le32 reserved1;
__le16 rbid;
u8 flags;
u8 reserved2[25];
} __packed;
/**
* struct iwl_rx_completion_desc_bz - Bz completion descriptor
* @rbid: unique tag of the received buffer
* @flags: flags (0: fragmented, all others: reserved)
* @reserved: reserved
*/
struct iwl_rx_completion_desc_bz {
__le16 rbid;
u8 flags;
u8 reserved[1];
} __packed;
/**
* struct iwl_rxq - Rx queue
* @id: queue index
* @bd: driver's pointer to buffer of receive buffer descriptors (rbd).
* Address size is 32 bit in pre-9000 devices and 64 bit in 9000 devices.
* In AX210 devices it is a pointer to a list of iwl_rx_transfer_desc's
* @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
* @used_bd: driver's pointer to buffer of used receive buffer descriptors (rbd)
* @used_bd_dma: physical address of buffer of used receive buffer descriptors (rbd)
* @read: Shared index to newest available Rx buffer
* @write: Shared index to oldest written Rx packet
* @write_actual: actual write pointer written to device, since we update in
* blocks of 8 only
* @free_count: Number of pre-allocated buffers in rx_free
* @used_count: Number of RBDs handled to allocator to use for allocation
* @write_actual:
* @rx_free: list of RBDs with allocated RB ready for use
* @rx_used: list of RBDs with no RB attached
* @need_update: flag to indicate we need to update read/write index
* @rb_stts: driver's pointer to receive buffer status
* @rb_stts_dma: bus address of receive buffer status
* @lock: per-queue lock
* @queue: actual rx queue. Not used for multi-rx queue.
* @next_rb_is_fragment: indicates that the previous RB that we handled set
* the fragmented flag, so the next one is still another fragment
* @napi: NAPI struct for this queue
Annotation
- Immediate include surface: `linux/spinlock.h`, `linux/interrupt.h`, `linux/skbuff.h`, `linux/wait.h`, `linux/pci.h`, `linux/timer.h`, `linux/cpu.h`, `iwl-fh.h`.
- Detected declarations: `struct iwl_host_cmd`, `struct iwl_rx_mem_buffer`, `struct isr_statistics`, `struct iwl_rx_transfer_desc`, `struct iwl_rx_completion_desc`, `struct iwl_rx_completion_desc_bz`, `struct iwl_rxq`, `struct iwl_rb_allocator`, `struct cont_rec`, `struct iwl_pcie_txq_entry`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.