drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c
Source file repositories/reference/linux-study-clean/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c- Extension
.c- Size
- 122706 bytes
- Lines
- 4444
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/pci.hlinux/interrupt.hlinux/debugfs.hlinux/sched.hlinux/bitops.hlinux/gfp.hlinux/vmalloc.hlinux/module.hlinux/wait.hlinux/seq_file.hiwl-drv.hiwl-trans.hiwl-csr.hiwl-prph.hiwl-scd.hiwl-agn-hw.hfw/error-dump.hfw/dbg.hfw/api/tx.hfw/acpi.hmei/iwl-mei.hinternal.hiwl-fh.hpcie/iwl-context-info-v2.hpcie/utils.h
Detected Declarations
struct iwl_causes_liststruct iwl_trans_pcie_removalstruct iwl_dbgfs_tx_queue_privstruct iwl_dbgfs_tx_queue_statefunction Copyrightfunction iwl_pcie_dump_host_monitorfunction iwl_trans_pcie_sw_resetfunction iwl_pcie_free_fw_monitorfunction iwl_pcie_alloc_fw_monitor_blockfunction iwl_pcie_alloc_fw_monitorfunction iwl_trans_pcie_read_shrfunction iwl_trans_pcie_write_shrfunction iwl_pcie_set_pwrfunction iwl_pcie_apm_configfunction iwl_pcie_apm_initfunction iwl_pcie_apm_lp_xtal_enablefunction iwl_pcie_apm_stop_masterfunction iwl_pcie_apm_stopfunction iwl_pcie_nic_initfunction iwl_pcie_set_hw_readyfunction iwl_pcie_prepare_card_hwfunction iwl_pcie_load_firmware_chunk_fhfunction iwl_pcie_load_firmware_chunkfunction iwl_pcie_load_sectionfunction iwl_pcie_load_cpu_sections_8000function iwl_pcie_load_cpu_sectionsfunction iwl_pcie_apply_destination_inifunction iwl_pcie_apply_destinationfunction iwl_pcie_load_given_ucodefunction iwl_pcie_load_given_ucode_8000function iwl_pcie_check_hw_rf_killfunction iwl_pcie_map_listfunction iwl_pcie_map_non_rx_causesfunction iwl_pcie_map_rx_causesfunction iwl_pcie_conf_msix_hwfunction iwl_pcie_init_msixfunction _iwl_trans_pcie_stop_devicefunction iwl_pcie_synchronize_irqsfunction iwl_trans_pcie_start_fwfunction iwl_trans_pcie_fw_alivefunction iwl_trans_pcie_handle_stop_rfkillfunction iwl_trans_pcie_stop_devicefunction iwl_trans_pcie_rf_killfunction iwl_pcie_d3_complete_suspendfunction iwl_pcie_d3_handshakefunction iwl_trans_pcie_d3_suspendfunction iwl_trans_pcie_d3_resumefunction iwl_pcie_set_interrupt_capa
Annotated Snippet
static const struct file_operations iwl_dbgfs_##name##_ops = { \
.read = iwl_dbgfs_##name##_read, \
.open = simple_open, \
.llseek = generic_file_llseek, \
};
#define DEBUGFS_WRITE_FILE_OPS(name) \
static const struct file_operations iwl_dbgfs_##name##_ops = { \
.write = iwl_dbgfs_##name##_write, \
.open = simple_open, \
.llseek = generic_file_llseek, \
};
#define DEBUGFS_READ_WRITE_FILE_OPS(name) \
static const struct file_operations iwl_dbgfs_##name##_ops = { \
.write = iwl_dbgfs_##name##_write, \
.read = iwl_dbgfs_##name##_read, \
.open = simple_open, \
.llseek = generic_file_llseek, \
};
struct iwl_dbgfs_tx_queue_priv {
struct iwl_trans *trans;
};
struct iwl_dbgfs_tx_queue_state {
loff_t pos;
};
static void *iwl_dbgfs_tx_queue_seq_start(struct seq_file *seq, loff_t *pos)
{
struct iwl_dbgfs_tx_queue_priv *priv = seq->private;
struct iwl_dbgfs_tx_queue_state *state;
if (*pos >= priv->trans->mac_cfg->base->num_of_queues)
return NULL;
state = kmalloc_obj(*state);
if (!state)
return NULL;
state->pos = *pos;
return state;
}
static void *iwl_dbgfs_tx_queue_seq_next(struct seq_file *seq,
void *v, loff_t *pos)
{
struct iwl_dbgfs_tx_queue_priv *priv = seq->private;
struct iwl_dbgfs_tx_queue_state *state = v;
*pos = ++state->pos;
if (*pos >= priv->trans->mac_cfg->base->num_of_queues)
return NULL;
return state;
}
static void iwl_dbgfs_tx_queue_seq_stop(struct seq_file *seq, void *v)
{
kfree(v);
}
static int iwl_dbgfs_tx_queue_seq_show(struct seq_file *seq, void *v)
{
struct iwl_dbgfs_tx_queue_priv *priv = seq->private;
struct iwl_dbgfs_tx_queue_state *state = v;
struct iwl_trans *trans = priv->trans;
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
struct iwl_txq *txq = trans_pcie->txqs.txq[state->pos];
seq_printf(seq, "hwq %.3u: used=%d stopped=%d ",
(unsigned int)state->pos,
!!test_bit(state->pos, trans_pcie->txqs.queue_used),
!!test_bit(state->pos, trans_pcie->txqs.queue_stopped));
if (txq)
seq_printf(seq,
"read=%u write=%u need_update=%d frozen=%d n_window=%d ampdu=%d",
txq->read_ptr, txq->write_ptr,
txq->need_update, txq->frozen,
txq->n_window, txq->ampdu);
else
seq_puts(seq, "(unallocated)");
if (state->pos == trans->conf.cmd_queue)
seq_puts(seq, " (HCMD)");
seq_puts(seq, "\n");
return 0;
}
Annotation
- Immediate include surface: `linux/pci.h`, `linux/interrupt.h`, `linux/debugfs.h`, `linux/sched.h`, `linux/bitops.h`, `linux/gfp.h`, `linux/vmalloc.h`, `linux/module.h`.
- Detected declarations: `struct iwl_causes_list`, `struct iwl_trans_pcie_removal`, `struct iwl_dbgfs_tx_queue_priv`, `struct iwl_dbgfs_tx_queue_state`, `function Copyright`, `function iwl_pcie_dump_host_monitor`, `function iwl_trans_pcie_sw_reset`, `function iwl_pcie_free_fw_monitor`, `function iwl_pcie_alloc_fw_monitor_block`, `function iwl_pcie_alloc_fw_monitor`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: pattern implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.