drivers/net/wireless/marvell/mwifiex/sdio.h
Source file repositories/reference/linux-study-clean/drivers/net/wireless/marvell/mwifiex/sdio.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/net/wireless/marvell/mwifiex/sdio.h- Extension
.h- Size
- 9450 bytes
- Lines
- 380
- Domain
- Driver Families
- Bucket
- drivers/net
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/completion.hlinux/mmc/sdio.hlinux/mmc/sdio_ids.hlinux/mmc/sdio_func.hlinux/mmc/card.hlinux/mmc/host.hmain.h
Detected Declarations
struct mwifiex_sdio_mpa_txstruct mwifiex_sdio_mpa_rxstruct mwifiex_sdio_card_regstruct sdio_mmc_cardstruct mwifiex_sdio_devicefunction mwifiex_sdio_cmdrsp_completefunction mwifiex_sdio_event_completefunction mp_rx_aggr_port_limit_reachedfunction mp_tx_aggr_port_limit_reachedfunction mp_rx_aggr_setup
Annotated Snippet
struct mwifiex_sdio_mpa_tx {
/* multiport tx aggregation buffer pointer */
u8 *buf;
u32 buf_len;
u32 pkt_cnt;
u32 ports;
u16 start_port;
u8 enabled;
u32 buf_size;
u32 pkt_aggr_limit;
};
struct mwifiex_sdio_mpa_rx {
u8 *buf;
u32 buf_len;
u32 pkt_cnt;
u32 ports;
u16 start_port;
u32 *len_arr;
u8 enabled;
u32 buf_size;
u32 pkt_aggr_limit;
};
int mwifiex_bus_register(void);
void mwifiex_bus_unregister(void);
struct mwifiex_sdio_card_reg {
u8 start_rd_port;
u8 start_wr_port;
u8 base_0_reg;
u8 base_1_reg;
u8 poll_reg;
u8 host_int_enable;
u8 host_int_rsr_reg;
u8 host_int_status_reg;
u8 host_int_mask_reg;
u8 host_strap_reg;
u8 host_strap_mask;
u8 host_strap_value;
u8 status_reg_0;
u8 status_reg_1;
u8 sdio_int_mask;
u32 data_port_mask;
u8 io_port_0_reg;
u8 io_port_1_reg;
u8 io_port_2_reg;
u8 max_mp_regs;
u8 rd_bitmap_l;
u8 rd_bitmap_u;
u8 rd_bitmap_1l;
u8 rd_bitmap_1u;
u8 wr_bitmap_l;
u8 wr_bitmap_u;
u8 wr_bitmap_1l;
u8 wr_bitmap_1u;
u8 rd_len_p0_l;
u8 rd_len_p0_u;
u8 card_misc_cfg_reg;
u8 card_cfg_2_1_reg;
u8 cmd_rd_len_0;
u8 cmd_rd_len_1;
u8 cmd_rd_len_2;
u8 cmd_rd_len_3;
u8 cmd_cfg_0;
u8 cmd_cfg_1;
u8 cmd_cfg_2;
u8 cmd_cfg_3;
u8 fw_dump_host_ready;
u8 fw_dump_ctrl;
u8 fw_dump_start;
u8 fw_dump_end;
u8 func1_dump_reg_start;
u8 func1_dump_reg_end;
u8 func1_scratch_reg;
u8 func1_spec_reg_num;
u8 func1_spec_reg_table[MWIFIEX_MAX_FUNC2_REG_NUM];
};
struct sdio_mmc_card {
struct sdio_func *func;
struct mwifiex_adapter *adapter;
struct completion fw_done;
const char *firmware;
const char *firmware_sdiouart;
const struct mwifiex_sdio_card_reg *reg;
u8 max_ports;
u8 mp_agg_pkt_limit;
u16 tx_buf_size;
Annotation
- Immediate include surface: `linux/completion.h`, `linux/mmc/sdio.h`, `linux/mmc/sdio_ids.h`, `linux/mmc/sdio_func.h`, `linux/mmc/card.h`, `linux/mmc/host.h`, `main.h`.
- Detected declarations: `struct mwifiex_sdio_mpa_tx`, `struct mwifiex_sdio_mpa_rx`, `struct mwifiex_sdio_card_reg`, `struct sdio_mmc_card`, `struct mwifiex_sdio_device`, `function mwifiex_sdio_cmdrsp_complete`, `function mwifiex_sdio_event_complete`, `function mp_rx_aggr_port_limit_reached`, `function mp_tx_aggr_port_limit_reached`, `function mp_rx_aggr_setup`.
- Atlas domain: Driver Families / drivers/net.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.