drivers/net/wireless/mediatek/mt76/mt7603/regs.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/mediatek/mt76/mt7603/regs.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/mediatek/mt76/mt7603/regs.h
Extension
.h
Size
26433 bytes
Lines
781
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __MT7603_REGS_H
#define __MT7603_REGS_H

#define MT_HW_REV			0x1000
#define MT_HW_CHIPID			0x1008
#define MT_TOP_MISC2			0x1134

#define MT_MCU_BASE			0x2000
#define MT_MCU(ofs)			(MT_MCU_BASE + (ofs))

#define MT_MCU_PCIE_REMAP_1		MT_MCU(0x500)
#define MT_MCU_PCIE_REMAP_1_OFFSET	GENMASK(17, 0)
#define MT_MCU_PCIE_REMAP_1_BASE	GENMASK(31, 18)

#define MT_MCU_PCIE_REMAP_2		MT_MCU(0x504)
#define MT_MCU_PCIE_REMAP_2_OFFSET	GENMASK(18, 0)
#define MT_MCU_PCIE_REMAP_2_BASE	GENMASK(31, 19)

#define MT_HIF_BASE			0x4000
#define MT_HIF(ofs)			(MT_HIF_BASE + (ofs))

#define MT_INT_SOURCE_CSR		MT_HIF(0x200)
#define MT_INT_MASK_CSR			MT_HIF(0x204)
#define MT_DELAY_INT_CFG		MT_HIF(0x210)

#define MT_INT_RX_DONE(_n)		BIT(_n)
#define MT_INT_RX_DONE_ALL		GENMASK(1, 0)
#define MT_INT_TX_DONE_ALL		GENMASK(19, 4)
#define MT_INT_TX_DONE(_n)		BIT((_n) + 4)

#define MT_INT_RX_COHERENT		BIT(20)
#define MT_INT_TX_COHERENT		BIT(21)
#define MT_INT_MAC_IRQ3			BIT(27)

#define MT_INT_MCU_CMD			BIT(30)

#define MT_WPDMA_GLO_CFG		MT_HIF(0x208)
#define MT_WPDMA_GLO_CFG_TX_DMA_EN	BIT(0)
#define MT_WPDMA_GLO_CFG_TX_DMA_BUSY	BIT(1)
#define MT_WPDMA_GLO_CFG_RX_DMA_EN	BIT(2)
#define MT_WPDMA_GLO_CFG_RX_DMA_BUSY	BIT(3)
#define MT_WPDMA_GLO_CFG_DMA_BURST_SIZE	GENMASK(5, 4)
#define MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE	BIT(6)
#define MT_WPDMA_GLO_CFG_BIG_ENDIAN	BIT(7)
#define MT_WPDMA_GLO_CFG_HDR_SEG_LEN	GENMASK(15, 8)
#define MT_WPDMA_GLO_CFG_SW_RESET	BIT(24)
#define MT_WPDMA_GLO_CFG_FORCE_TX_EOF	BIT(25)
#define MT_WPDMA_GLO_CFG_CLK_GATE_DIS	BIT(30)
#define MT_WPDMA_GLO_CFG_RX_2B_OFFSET	BIT(31)

#define MT_WPDMA_RST_IDX		MT_HIF(0x20c)

#define MT_WPDMA_DEBUG			MT_HIF(0x244)
#define MT_WPDMA_DEBUG_VALUE		GENMASK(17, 0)
#define MT_WPDMA_DEBUG_SEL		BIT(27)
#define MT_WPDMA_DEBUG_IDX		GENMASK(31, 28)

#define MT_TX_RING_BASE			MT_HIF(0x300)
#define MT_RX_RING_BASE			MT_HIF(0x400)

#define MT_TXTIME_THRESH_BASE		MT_HIF(0x500)
#define MT_TXTIME_THRESH(n)		(MT_TXTIME_THRESH_BASE + ((n) * 4))

#define MT_PAGE_COUNT_BASE		MT_HIF(0x540)
#define MT_PAGE_COUNT(n)		(MT_PAGE_COUNT_BASE + ((n) * 4))

#define MT_SCH_1			MT_HIF(0x588)
#define MT_SCH_2			MT_HIF(0x58c)
#define MT_SCH_3			MT_HIF(0x590)

#define MT_SCH_4			MT_HIF(0x594)
#define MT_SCH_4_FORCE_QID		GENMASK(4, 0)
#define MT_SCH_4_BYPASS			BIT(5)
#define MT_SCH_4_RESET			BIT(8)

#define MT_GROUP_THRESH_BASE		MT_HIF(0x598)
#define MT_GROUP_THRESH(n)		(MT_GROUP_THRESH_BASE + ((n) * 4))

#define MT_QUEUE_PRIORITY_1		MT_HIF(0x580)
#define MT_QUEUE_PRIORITY_2		MT_HIF(0x584)

#define MT_BMAP_0			MT_HIF(0x5b0)
#define MT_BMAP_1			MT_HIF(0x5b4)
#define MT_BMAP_2			MT_HIF(0x5b8)

#define MT_HIGH_PRIORITY_1		MT_HIF(0x5bc)
#define MT_HIGH_PRIORITY_2		MT_HIF(0x5c0)

#define MT_PRIORITY_MASK		MT_HIF(0x5c4)

Annotation

Implementation Notes