drivers/net/wireless/mediatek/mt76/mt7615/regs.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/mediatek/mt76/mt7615/regs.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/mediatek/mt76/mt7615/regs.h
Extension
.h
Size
21764 bytes
Lines
620
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __MT7615_REGS_H
#define __MT7615_REGS_H

enum mt7615_reg_base {
	MT_TOP_CFG_BASE,
	MT_HW_BASE,
	MT_DMA_SHDL_BASE,
	MT_PCIE_REMAP_2,
	MT_ARB_BASE,
	MT_HIF_BASE,
	MT_CSR_BASE,
	MT_PLE_BASE,
	MT_PSE_BASE,
	MT_CFG_BASE,
	MT_AGG_BASE,
	MT_TMAC_BASE,
	MT_RMAC_BASE,
	MT_DMA_BASE,
	MT_PF_BASE,
	MT_WTBL_BASE_ON,
	MT_WTBL_BASE_OFF,
	MT_LPON_BASE,
	MT_MIB_BASE,
	MT_WTBL_BASE_ADDR,
	MT_PCIE_REMAP_BASE2,
	MT_TOP_MISC_BASE,
	MT_EFUSE_ADDR_BASE,
	MT_PP_BASE,
	__MT_BASE_MAX,
};

#define MT_HW_INFO_BASE			((dev)->reg_map[MT_HW_BASE])
#define MT_HW_INFO(ofs)			(MT_HW_INFO_BASE + (ofs))
#define MT_HW_REV			MT_HW_INFO(0x000)
#define MT_HW_CHIPID			MT_HW_INFO(0x008)
#define MT_TOP_STRAP_STA		MT_HW_INFO(0x010)
#define MT_TOP_3NSS			BIT(24)

#define MT_TOP_OFF_RSV			0x1128
#define MT_TOP_OFF_RSV_FW_STATE		GENMASK(18, 16)

#define MT_TOP_MISC2			((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134)
#define MT_TOP_MISC2_FW_STATE		GENMASK(2, 0)

#define MT7663_TOP_MISC2_FW_STATE	GENMASK(3, 1)
#define MT_TOP_MISC2_FW_PWR_ON		BIT(1)

#define MT_MCU_BASE			0x2000
#define MT_MCU(ofs)			(MT_MCU_BASE + (ofs))

#define MT_MCU_PCIE_REMAP_1		MT_MCU(0x500)
#define MT_MCU_PCIE_REMAP_1_OFFSET	GENMASK(17, 0)
#define MT_MCU_PCIE_REMAP_1_BASE	GENMASK(31, 18)
#define MT_PCIE_REMAP_BASE_1		0x40000

#define MT_MCU_PCIE_REMAP_2		((dev)->reg_map[MT_PCIE_REMAP_2])
#define MT_MCU_PCIE_REMAP_2_OFFSET	GENMASK(18, 0)
#define MT_MCU_PCIE_REMAP_2_BASE	GENMASK(31, 19)
#define MT_PCIE_REMAP_BASE_2		((dev)->reg_map[MT_PCIE_REMAP_BASE2])

#define MT_MCU_CIRQ_BASE		0xc0000
#define MT_MCU_CIRQ(ofs)		(MT_MCU_CIRQ_BASE + (ofs))

#define MT_MCU_CIRQ_IRQ_SEL(n)		MT_MCU_CIRQ((n) << 2)

#define MT_HIF(ofs)			((dev)->reg_map[MT_HIF_BASE] + (ofs))
#define MT_HIF_RST			MT_HIF(0x100)
#define MT_HIF_LOGIC_RST_N		BIT(4)

#define MT_PDMA_SLP_PROT		MT_HIF(0x154)
#define MT_PDMA_AXI_SLPPROT_ENABLE	BIT(0)
#define MT_PDMA_AXI_SLPPROT_RDY		BIT(16)

#define MT_PDMA_BUSY_STATUS		MT_HIF(0x168)
#define MT_PDMA_TX_IDX_BUSY		BIT(2)
#define MT_PDMA_BUSY_IDX		BIT(31)

#define MT_WPDMA_TX_RING0_CTRL0		MT_HIF(0x300)
#define MT_WPDMA_TX_RING0_CTRL1		MT_HIF(0x304)

#define MT7663_MCU_PCIE_REMAP_2_OFFSET	GENMASK(15, 0)
#define MT7663_MCU_PCIE_REMAP_2_BASE	GENMASK(31, 16)

#define MT_HIF2_BASE			0xf0000
#define MT_HIF2(ofs)			(MT_HIF2_BASE + (ofs))
#define MT_PCIE_IRQ_ENABLE		MT_HIF2(0x188)
#define MT_PCIE_DOORBELL_PUSH		MT_HIF2(0x1484)

#define MT_CFG_LPCR_HOST		MT_HIF(0x1f0)
#define MT_CFG_LPCR_HOST_FW_OWN		BIT(0)

Annotation

Implementation Notes