drivers/net/wireless/mediatek/mt76/mt76x0/initvals_init.h

Source file repositories/reference/linux-study-clean/drivers/net/wireless/mediatek/mt76/mt76x0/initvals_init.h

File Facts

System
Linux kernel
Corpus path
drivers/net/wireless/mediatek/mt76/mt76x0/initvals_init.h
Extension
.h
Size
5218 bytes
Lines
160
Domain
Driver Families
Bucket
drivers/net
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __MT76X0U_INITVALS_INIT_H
#define __MT76X0U_INITVALS_INIT_H

#include "phy.h"

static const struct mt76_reg_pair common_mac_reg_table[] = {
	{ MT_BCN_OFFSET(0),		0xf8f0e8e0 },
	{ MT_BCN_OFFSET(1),		0x6f77d0c8 },
	{ MT_LEGACY_BASIC_RATE,		0x0000013f },
	{ MT_HT_BASIC_RATE,		0x00008003 },
	{ MT_MAC_SYS_CTRL,		0x00000000 },
	{ MT_RX_FILTR_CFG,		0x00017f97 },
	{ MT_BKOFF_SLOT_CFG,		0x00000209 },
	{ MT_TX_SW_CFG0,		0x00000000 },
	{ MT_TX_SW_CFG1,		0x00080606 },
	{ MT_TX_LINK_CFG,		0x00001020 },
	{ MT_TX_TIMEOUT_CFG,		0x000a2090 },
	{ MT_MAX_LEN_CFG,		0xa0fff | 0x00001000 },
	{ MT_LED_CFG,			0x7f031e46 },
	{ MT_PBF_TX_MAX_PCNT,		0x1fbf1f1f },
	{ MT_PBF_RX_MAX_PCNT,		0x0000fe9f },
	{ MT_TX_RETRY_CFG,		0x47d01f0f },
	{ MT_AUTO_RSP_CFG,		0x00000013 },
	{ MT_CCK_PROT_CFG,		0x07f40003 },
	{ MT_OFDM_PROT_CFG,		0x07f42004 },
	{ MT_PBF_CFG,			0x00f40006 },
	{ MT_WPDMA_GLO_CFG,		0x00000030 },
	{ MT_GF20_PROT_CFG,		0x01742004 },
	{ MT_GF40_PROT_CFG,		0x03f42084 },
	{ MT_MM20_PROT_CFG,		0x01742004 },
	{ MT_MM40_PROT_CFG,		0x03f42084 },
	{ MT_TXOP_CTRL_CFG,		0x0000583f },
	{ MT_TX_RTS_CFG,		0x00ffff20 },
	{ MT_EXP_ACK_TIME,		0x002400ca },
	{ MT_TXOP_HLDR_ET,		0x00000002 },
	{ MT_XIFS_TIME_CFG,		0x33a41010 },
	{ MT_PWR_PIN_CFG,		0x00000000 },
};

static const struct mt76_reg_pair mt76x0_mac_reg_table[] = {
	{ MT_IOCFG_6,			0xa0040080 },
	{ MT_PBF_SYS_CTRL,		0x00080c00 },
	{ MT_PBF_CFG,			0x77723c1f },
	{ MT_FCE_PSE_CTRL,		0x00000001 },
	{ MT_AMPDU_MAX_LEN_20M1S,	0xAAA99887 },
	{ MT_TX_SW_CFG0,		0x00000601 },
	{ MT_TX_SW_CFG1,		0x00040000 },
	{ MT_TX_SW_CFG2,		0x00000000 },
	{ 0xa44,			0x00000000 },
	{ MT_HEADER_TRANS_CTRL_REG,	0x00000000 },
	{ MT_TSO_CTRL,			0x00000000 },
	{ MT_BB_PA_MODE_CFG1,		0x00500055 },
	{ MT_RF_PA_MODE_CFG1,		0x00500055 },
	{ MT_TX_ALC_CFG_0,		0x2F2F000C },
	{ MT_TX0_BB_GAIN_ATTEN,		0x00000000 },
	{ MT_TX_PWR_CFG_0,		0x3A3A3A3A },
	{ MT_TX_PWR_CFG_1,		0x3A3A3A3A },
	{ MT_TX_PWR_CFG_2,		0x3A3A3A3A },
	{ MT_TX_PWR_CFG_3,		0x3A3A3A3A },
	{ MT_TX_PWR_CFG_4,		0x3A3A3A3A },
	{ MT_TX_PWR_CFG_7,		0x3A3A3A3A },
	{ MT_TX_PWR_CFG_8,		0x0000003A },
	{ MT_TX_PWR_CFG_9,		0x0000003A },
	{ 0x150C,			0x00000002 },
	{ 0x1238,			0x001700C8 },
	{ MT_LDO_CTRL_0,		0x00A647B6 },
	{ MT_LDO_CTRL_1,		0x6B006464 },
	{ MT_HT_BASIC_RATE,		0x00004003 },
	{ MT_HT_CTRL_CFG,		0x000001FF },
	{ MT_TXOP_HLDR_ET,		0x00000000 },
	{ MT_PN_PAD_MODE,		0x00000003 },
	{ MT_TX_PROT_CFG6,		0xe3f42004 },
	{ MT_TX_PROT_CFG7,		0xe3f42084 },
	{ MT_TX_PROT_CFG8,		0xe3f42104 },
	{ MT_VHT_HT_FBK_CFG1,		0xedcba980 },
};

static const struct mt76_reg_pair mt76x0_bbp_init_tab[] = {
	{ MT_BBP(CORE, 1),	0x00000002 },
	{ MT_BBP(CORE, 4),	0x00000000 },
	{ MT_BBP(CORE, 24),	0x00000000 },
	{ MT_BBP(CORE, 32),	0x4003000a },
	{ MT_BBP(CORE, 42),	0x00000000 },
	{ MT_BBP(CORE, 44),	0x00000000 },
	{ MT_BBP(IBI, 11),	0x0FDE8081 },
	{ MT_BBP(AGC, 0),	0x00021400 },
	{ MT_BBP(AGC, 1),	0x00000003 },
	{ MT_BBP(AGC, 2),	0x003A6464 },
	{ MT_BBP(AGC, 15),	0x88A28CB8 },
	{ MT_BBP(AGC, 22),	0x00001E21 },

Annotation

Implementation Notes